文件名称:aes-core-include-testbentch
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aes core的verilog代码，包含测试代码和波形文件-aes core verilog code including testbentch
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aes_core
........\bench
........\.....\CVS
........\.....\...\Entries
........\.....\...\Entries.Extra
........\.....\...\Entries.Extra.Old
........\.....\...\Entries.Log
........\.....\...\Entries.Old
........\.....\...\Repository
........\.....\...\Root
........\.....\...\Template
........\.....\verilog
........\.....\.......\CVS
........\.....\.......\...\Entries
........\.....\.......\...\Entries.Extra
........\.....\.......\...\Entries.Extra.Old
........\.....\.......\...\Entries.Old
........\.....\.......\...\Repository
........\.....\.......\...\Root
........\.....\.......\...\Template
........\.....\.......\test_bench_top.v
........\CVS
........\...\Entries
........\...\Entries.Extra
........\...\Entries.Extra.Old
........\...\Entries.Log
........\...\Entries.Old
........\...\Repository
........\...\Root
........\...\Template
........\doc
........\...\aes.pdf
........\...\CVS
........\...\...\Entries
........\...\...\Entries.Extra
........\...\...\Entries.Extra.Old
........\...\...\Entries.Old
........\...\...\Repository
........\...\...\Root
........\...\...\Template
........\readme.txt
........\rtl
........\...\CVS
........\...\...\Entries
........\...\...\Entries.Extra
........\...\...\Entries.Extra.Old
........\...\...\Entries.Log
........\...\...\Entries.Old
........\...\...\Repository
........\...\...\Root
........\...\...\Template
........\...\verilog
........\...\.......\aes_cipher_top.v
........\...\.......\aes_inv_cipher_top.v
........\...\.......\aes_inv_sbox.v
........\...\.......\aes_key_expand_128.v
........\...\.......\aes_rcon.v
........\...\.......\aes_sbox.v
........\...\.......\CVS
........\...\.......\...\Entries
........\...\.......\...\Entries.Extra
........\...\.......\...\Entries.Extra.Old
........\...\.......\...\Entries.Old
........\...\.......\...\Repository
........\...\.......\...\Root
........\...\.......\...\Template
........\...\.......\timescale.v
........\sim
........\...\CVS
........\...\...\Entries
........\...\...\Entries.Extra
........\...\...\Entries.Extra.Old
........\...\...\Entries.Log
........\...\...\Entries.Old
........\...\...\Repository
........\...\...\Root
........\...\...\Template
........\...\rtl_sim
........\...\.......\bin
........\...\.......\...\CVS
........\...\.......\...\...\Entries
........\...\.......\...\...\Entries.Extra
........\...\.......\...\...\Entries.Extra.Old
........\...\.......\...\...\Entries.Old
........\...\.......\...\...\Repository
........\...\.......\...\...\Root
........\...\.......\...\...\Template
........\...\.......\...\Makefile
........\...\.......\CVS
........\...\.......\...\Entries
........\...\.......\...\Entries.Extra
........\...\.......\...\Entries.Extra.Old
........\...\.......\...\Entries.Log
........\...\.......\...\Entries.Old
........\...\.......\...\Repository
........\...\.......\...\Root
........\...\.......\...\Template
........\...\.......\run
........\...\.......\...\CVS
........\...\.......\...\...\Entries