文件名称:quartus
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流水灯状态机的一段式描述和二段式描述还有三段式描述的Verilog源码-Light water section of the state machine and the two-stage type descr iption descr iption descr iption of Verilog source code as well as three-
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下载文件列表
water_led_state
...............\db
...............\..\logic_util_heursitic.dat
...............\..\prev_cmp_top.qmsg
...............\..\top.cbx.xml
...............\..\top.cmp.rdb
...............\..\top.cmp_merge.kpt
...............\..\top.db_info
...............\..\top.hier_info
...............\..\top.hif
...............\..\top.ipinfo
...............\..\top.lpc.html
...............\..\top.lpc.rdb
...............\..\top.lpc.txt
...............\..\top.map.ammdb
...............\..\top.map.bpm
...............\..\top.map.cdb
...............\..\top.map.hdb
...............\..\top.map.kpt
...............\..\top.map.logdb
...............\..\top.map.qmsg
...............\..\top.map.rdb
...............\..\top.map_bb.cdb
...............\..\top.map_bb.hdb
...............\..\top.map_bb.logdb
...............\..\top.pre_map.hdb
...............\..\top.pti_db_list.ddb
...............\..\top.root_partition.map.reg_db.cdb
...............\..\top.rtlv.hdb
...............\..\top.rtlv_sg.cdb
...............\..\top.rtlv_sg_swap.cdb
...............\..\top.sgdiff.cdb
...............\..\top.sgdiff.hdb
...............\..\top.sld_design_entry.sci
...............\..\top.sld_design_entry_dsc.sci
...............\..\top.smart_action.txt
...............\..\top.smp_dump.txt
...............\..\top.syn_hier_info
...............\..\top.tis_db_list.ddb
...............\..\top.tmw_info
...............\incremental_db
...............\..............\README
...............\..............\compiled_partitions
...............\..............\...................\top.db_info
...............\..............\...................\top.root_partition.map.cdb
...............\..............\...................\top.root_partition.map.dpi
...............\..............\...................\top.root_partition.map.hbdb.cdb
...............\..............\...................\top.root_partition.map.hbdb.hb_info
...............\..............\...................\top.root_partition.map.hbdb.hdb
...............\..............\...................\top.root_partition.map.hbdb.sig
...............\..............\...................\top.root_partition.map.hdb
...............\..............\...................\top.root_partition.map.kpt
...............\output_files
...............\............\top.done
...............\............\top.flow.rpt
...............\............\top.map.rpt
...............\............\top.map.summary
...............\simulation
...............\..........\modelsim
...............\..........\........\modelsim.ini
...............\..........\........\msim_transcript
...............\..........\........\rtl_work
...............\..........\........\........\_info
...............\..........\........\........\_temp
...............\..........\........\........\_vmake
...............\..........\........\........\tb_top
...............\..........\........\........\......\_primary.dat
...............\..........\........\........\......\_primary.dbs
...............\..........\........\........\......\_primary.vhd
...............\..........\........\........\......\verilog.prw
...............\..........\........\........\......\verilog.psm
...............\..........\........\........\top
...............\..........\........\........\...\_primary.dat
...............\..........\........\........\...\_primary.dbs
...............\..........\........\........\...\_primary.vhd
...............\..........\........\........\...\verilog.prw
...............\..........\........\........\...\verilog.psm
...............\..........\........\top_run_msim_rtl_verilog.do
...............\..........\........\top_run_msim_rtl_verilog.do.bak
...............\..........\........\top_run_msim_rtl_verilog.do.bak1
...............\..........\........\vsim.wlf
...............\tb_top.v
...............\top.qpf
...............\top.qsf
...............\top.qws
...............\top.v
...............\top.v.bak
...............\top_nativelink_simulation.rpt
water_led_state_2
.................\db
.................\..\logic_util_heursitic.dat
.................\..\prev_cmp_top.qmsg
.................\..\top.asm.qmsg
...........