文件名称:OV7725_i2c_timing_ctrl
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iic接口verilog HDL代码,经过测试验证,在OV7725控制接口上验证-
//i2c interface
output i2c_sclk, //i2c clock
inout i2c_sdat, //i2c data for bidirection
//user interface
input [7:0] i2c_config_size, //i2c config data counte
output reg [7:0] i2c_config_index, //i2c config reg index, read 2 reg and write xx reg
input [23:0] i2c_config_data, //i2c config data
output i2c_config_done, //i2c config timing complete
output reg [7:0] i2c_rdata //i2c register data while read i2c slave
//i2c interface
output i2c_sclk, //i2c clock
inout i2c_sdat, //i2c data for bidirection
//user interface
input [7:0] i2c_config_size, //i2c config data counte
output reg [7:0] i2c_config_index, //i2c config reg index, read 2 reg and write xx reg
input [23:0] i2c_config_data, //i2c config data
output i2c_config_done, //i2c config timing complete
output reg [7:0] i2c_rdata //i2c register data while read i2c slave
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i2c_timing_ctrl.v