文件名称:VHDL100

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  • 2015-07-11
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  • 6.63mb
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  • 0次
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  • 李**
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本文件包含100个Verilog实例,有存储器,时钟,椭圆滤波器,状态机等。有助于初学者的学习。-This document contains 100 examples of Verilog, there are memory, clock, elliptic filter, state machines. Help beginners to learn.
(系统自动生成,下载前可以参看下载内容)

下载文件列表





VHDL100\100vhdl例子\10_function\10_bit_to_int.vhd

.......\...........\...........\README.TXT

.......\...........\.1_wiredor\11_wiredor.vhd

.......\...........\..........\README.TXT

.......\...........\.2_convert\12_convert.vhd

.......\...........\..........\README.TXT

.......\...........\.3_SHL\13_SHL.VHD

.......\...........\......\README.TXT

.......\...........\.4_MVL7_functions\14_MVL7_functions.vhd

.......\...........\.................\README.TXT

.......\...........\.5_MUX41\15_MUX41.VHD

.......\...........\........\15_MVL7_functions.vhd

.......\...........\........\15_MVL7_syn_types.vhd

.......\...........\........\15_test_vectors_mux41.vhd

.......\...........\........\15_TYPES.VHD

.......\...........\........\README.TXT

.......\...........\.6_MUX\16_multiple_mux.vhd

.......\...........\......\16_MVL7_functions.vhd

.......\...........\......\16_test_vectors.vhd

.......\...........\......\16_TYPES.VHD

.......\...........\......\README.TXT

.......\...........\......\TYPES.VHD

.......\...........\.7_parity\17_parity.vhd

.......\...........\.........\17_test_bench.vhd

.......\...........\.........\README.TXT

.......\...........\.8_LIB\18_tech_lib.vhd

.......\...........\......\18_test_lib.vhd

.......\...........\......\README.TXT

.......\...........\.9_test_194\19_test_194.vhd

.......\...........\._ADDER\1_ADDER\1_ADDER.exp

.......\...........\.......\.......\files\L1.rpt

.......\...........\.......\.......\.....\L2.rpt

.......\...........\.......\.......\.....\L3.rpt

.......\...........\.......\.......\workdirs\aa\ADDER.sim

.......\...........\.......\.......\........\..\ADDER.syn

.......\...........\.......\.......\........\..\Anal.info

.......\...........\.......\.......\........\..\Anal.out

.......\...........\.......\.......\........\WORK\Anal.info

.......\...........\.......\.......\........\....\Anal.out

.......\...........\.......\.......\........\....\BIT_RTL_ADDER.sim

.......\...........\.......\.......\........\....\BIT_RTL_ADDER.syn

.......\...........\.......\1_adder.acf

.......\...........\.......\1_adder.hif

.......\...........\.......\1_adder.mmf

.......\...........\.......\1_ADDER.VHD

.......\...........\.......\bir_rtl_adder.acf

.......\...........\.......\bir_rtl_adder.hif

.......\...........\.......\bir_rtl_adder.mmf

.......\...........\.......\bir_rtl_adder.tdf

.......\...........\.......\bit_rtl_adder.acf

.......\...........\.......\bit_rtl_adder.hif

.......\...........\.......\bit_rtl_adder.mmf

.......\...........\.......\bit_rtl_adder.vhd

.......\...........\.......\LIB.DLS

.......\...........\.......\README.TXT

.......\...........\.......\U2268397.DLS

.......\...........\20_test_159\20_test_159.vhd

.......\...........\.1_test_13a\21_test_13a.vhd

.......\...........\.2_deadlock\22_deadlock.vhd

.......\...........\.3_test_120\23_Test_120.vhd

.......\...........\.4_test_195\24_test_195.vhd

.......\...........\.5_test_1\25_test_1.vhd

.......\...........\.........\25_test_1a.vhd

.......\...........\.6_test_74s\26_test_74s.vhd

.......\...........\.7_test_16\27_test_16.vhd

.......\...........\.8_test_64a\28_Test_64a.vhd

.......\...........\.9_test_35\29_Test_35.vhd

.......\...........\._ADDER\2_ADDER.VHD

.......\...........\.......\README.TXT

.......\...........\30_test_3\30_Test_3.vhd

.......\...........\.1_test_35b\31_test_35b.vhd

.......\...........\.2_test_110b\32_test_110b.vhd

.......\...........\.3_comparer\33_COMP.VHD

.......\...........\...........\33_comparer.vhd

.......\...........\...........\33_SIMU.VHD

.......\...........\...........\README.TXT

.......\...........\.4_BUS\34_readwrite.VHD

.......\...........\......\34_readwrite_stim.vhd

.......\...........\......\README.TXT

.......\...........\.5_486_bus\35_486_bus.vhd

.......\...........\..........\35_486_sys.vhd

.......\...........\..........\35_bit_pack.vhd

.......\...........\..........\35_bus_test.vhd

.......\...........\..........\35_ram_controller.vhd

.......\...........\..........\75_RAM.VHD

.......\...........\..........\README.TXT

.......\...........\.6_GCD\36_GCD.VHD

.......\...........\......\36_TEST.VHD

.......\...........\.

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