文件名称:0340196Lab3
介绍说明－－下载内容均来自于网络，请自行研究使用
这是用Verilog语言编写的带有pipeline功能的CPU，适合于学习计算机组织的同学-This is a Verilog language functions CPU with pipeline for students to learn computer organization
(系统自动生成,下载前可以参看下载内容)
下载文件列表
0340196Lab3\0340196Lab3.doc
...........\0340196Lab3.pdf
...........\adder.v
...........\ALU.v
...........\ALUctrl1.v
...........\CO_LAB3_test_data1.txt
...........\CO_LAB3_test_data2.txt
...........\CO_LAB3_test_data3.txt
...........\Data_Memory.v
...........\decode.v
...........\Instr_Memory.v
...........\MUX_2to1.v
...........\Mux_4to1.v
...........\ProgramCounter.v
...........\Reg_File.v
...........\Shift_Left_Two_32.v
...........\Sign_Extend.v
...........\Simple_Single_CPU.v
...........\Test_Bench.v
0340196Lab3