文件名称:majority
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modulemajority (major, V1, V2, V3)
start your comments with a forward slash and star and finish it with a star and forward slash.
output major
inputV1, V2, V3
wireN1, N2, N3
and A0 (N1, V1, V2)
andA1 (N2, V2, V3)
and A2 (N3, V3, V1)
orOr0(major, N1, N2, N3)
// Use two forward slashes for one line comments
Endmodule Each line of text in Verilog must terminate with a semicolon except endmodule. -modulemajority (major, V1, V2, V3)
start your comments with a forward slash and star and finish it with a star and forward slash.
output major
inputV1, V2, V3
wireN1, N2, N3
and A0 (N1, V1, V2)
andA1 (N2, V2, V3)
and A2 (N3, V3, V1)
orOr0(major, N1, N2, N3)
// Use two forward slashes for one line comments
Endmodule Each line of text in Verilog must terminate with a semicolon except endmodule.
start your comments with a forward slash and star and finish it with a star and forward slash.
output major
inputV1, V2, V3
wireN1, N2, N3
and A0 (N1, V1, V2)
andA1 (N2, V2, V3)
and A2 (N3, V3, V1)
orOr0(major, N1, N2, N3)
// Use two forward slashes for one line comments
Endmodule Each line of text in Verilog must terminate with a semicolon except endmodule. -modulemajority (major, V1, V2, V3)
start your comments with a forward slash and star and finish it with a star and forward slash.
output major
inputV1, V2, V3
wireN1, N2, N3
and A0 (N1, V1, V2)
andA1 (N2, V2, V3)
and A2 (N3, V3, V1)
orOr0(major, N1, N2, N3)
// Use two forward slashes for one line comments
Endmodule Each line of text in Verilog must terminate with a semicolon except endmodule.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
majority
........\db
........\..\logic_util_heursitic.dat
........\..\majority.asm.qmsg
........\..\majority.asm.rdb
........\..\majority.cbx.xml
........\..\majority.cmp.cdb
........\..\majority.cmp.hdb
........\..\majority.cmp.logdb
........\..\majority.cmp.rdb
........\..\majority.cmp0.ddb
........\..\majority.db_info
........\..\majority.fit.qmsg
........\..\majority.hier_info
........\..\majority.hif
........\..\majority.lpc.html
........\..\majority.lpc.rdb
........\..\majority.lpc.txt
........\..\majority.map.cdb
........\..\majority.map.hdb
........\..\majority.map.logdb
........\..\majority.map.qmsg
........\..\majority.pre_map.cdb
........\..\majority.pre_map.hdb
........\..\majority.root_partition.map.reg_db.cdb
........\..\majority.rtlv.hdb
........\..\majority.rtlv_sg.cdb
........\..\majority.rtlv_sg_swap.cdb
........\..\majority.sgdiff.cdb
........\..\majority.sgdiff.hdb
........\..\majority.sim.vwf
........\..\majority.sld_design_entry.sci
........\..\majority.sld_design_entry_dsc.sci
........\..\majority.smart_action.txt
........\..\majority.sta.qmsg
........\..\majority.sta.rdb
........\..\majority.sta_cmp.4_slow.tdb
........\..\majority.syn_hier_info
........\..\majority.tis_db_list.ddb
........\..\majority.tmw_info
........\..\prev_cmp_majority.qmsg
........\incremental_db
........\..............\compiled_partitions
........\..............\...................\majority.db_info
........\..............\...................\majority.root_partition.map.kpt
........\..............\README
........\majority.asm.rpt
........\majority.done
........\majority.fit.rpt
........\majority.fit.summary
........\majority.flow.rpt
........\majority.jdi
........\majority.map.rpt
........\majority.map.summary
........\majority.pin
........\majority.pof
........\majority.qpf
........\majority.qsf
........\majority.sim.rpt
........\majority.sof
........\majority.sta.rpt
........\majority.sta.summary
........\majority.v
........\majority.v.bak
........\majority.vwf
........\majority_assignment_defaults.qdf
........\qsim
........\....\hierarchy.nfind
........\....\majority.sim.vwf
........\....\pos_fit.nfind
........\....\pos_syn.nfind
........\....\pre_syn.nfind