文件名称:sss
介绍说明－－下载内容均来自于网络，请自行研究使用
使用Verilog语言编写源代码.调用一些基本的IP核，如DCM模块、DDS模块ChipScope模块、乘法器模块等来实现调制.最后通过编程并利用FPGA板子实现AM、DBS、SSB的调制。-Using Verilog language source code. Invoke some basic IP cores, such as DCM module, DDS module ChipScope modules, multiplier module to achieve modulation. Finally realize AM, DBS, SSB modulation by programming and the use of FPGA board.
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下载文件列表
lisong
......\.lso
......\add.prj
......\add.stx
......\add.v
......\add.xst
......\chipscope_my.v
......\clk_gen.v
......\clk_gen_arwz.ucf
......\clock.ucf
......\coregen_xil_6380_74.cgc
......\coregen_xil_6380_74.cgp
......\DCM_module.cmd_log
......\DCM_module.prj
......\DCM_module.spl
......\DCM_module.stx
......\DCM_module.sym
......\DCM_module.v
......\DCM_module.xst
......\dds_100k.prj
......\dds_100k.stx
......\dds_100k.v
......\dds_100k.xst
......\dds_10k.prj
......\dds_10k.stx
......\dds_10k.v
......\dds_10k.xst
......\fir.coe
......\ipcore_dir
......\..........\.lso
......\..........\clk_gen.v
......\..........\clk_gen.xaw
......\..........\clk_gen_arwz.ucf
......\..........\clk_gen_flist.txt
......\..........\clk_gen_readme.txt
......\..........\clk_gen_xmdf.tcl
......\..........\coregen.cgc
......\..........\coregen.cgp
......\..........\coregen.log
......\..........\coregen.rsp
......\..........\dds_1.asy
......\..........\dds_1.gise
......\..........\dds_1.ncf
......\..........\dds_1.ngc
......\..........\dds_1.sym
......\..........\dds_1.v
......\..........\dds_1.veo
......\..........\dds_1.vhd
......\..........\dds_1.vho
......\..........\dds_1.xco
......\..........\dds_1.xco.bak
......\..........\dds_1.xise
......\..........\dds_1_flist.txt
......\..........\dds_1_readme.txt
......\..........\dds_1_xmdf.tcl
......\..........\dds_2.asy
......\..........\dds_2.gise
......\..........\dds_2.ncf
......\..........\dds_2.ngc
......\..........\dds_2.sym
......\..........\dds_2.v
......\..........\dds_2.veo
......\..........\dds_2.vhd
......\..........\dds_2.vho
......\..........\dds_2.xco
......\..........\dds_2.xco.bak
......\..........\dds_2.xise
......\..........\dds_2_flist.txt
......\..........\dds_2_readme.txt
......\..........\dds_2_xmdf.tcl
......\..........\fir.asy
......\..........\fir.gise
......\..........\fir.mif
......\..........\fir.ncf
......\..........\fir.ngc
......\..........\fir.sym
......\..........\fir.v
......\..........\fir.veo
......\..........\fir.vhd
......\..........\fir.vho
......\..........\fir.xco
......\..........\fir.xco.bak
......\..........\fir.xise
......\..........\firCOEFF_auto0_0.mif
......\..........\firCOEFF_auto0_1.mif
......\..........\firfilt_decode_rom.mif
......\..........\fir_flist.txt
......\..........\fir_readme.txt
......\..........\fir_xmdf.tcl
......\..........\icon.asy
......\..........\icon.gise
......\..........\icon.ncf
......\..........\icon.ngc
......\..........\icon.v
......\..........\icon.veo
......\..........\icon.vhd
......\..........\icon.vho
......\..........\icon.xco
......\..........\icon.xise
......\..........\icon_flist.txt