文件名称:SensorHubDesignFilesSourceCode
介绍说明－－下载内容均来自于网络，请自行研究使用
sensor-hub技术是最新出来的技术，目前用在智能手机领域，手机里面的传感器越来越多，这给CPU带来很大的负担，功耗也随之提高。sensor-hub技术出来后，可以有效的解决这个问题，这是运行在lattice FPGA平台上的verilog源代码，欢迎大家一起交流学习，希望能给你带来帮助。-Sensor- the hub is the latest technology, the current use in the field of smart phones, mobile phone inside the sensor is increasing, which bring great burden to the CPU, power consumption increases.Sensor- the hub technology comes out, can effectively solve the problem, it is running on the lattice verilog code on FPGA platform, welcome to learn together, hope I can bring you help.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
SensorHubDesignFiles\bitstream
....................\.........\sensor_hub_bitmap.hex
....................\iCEcube2_project
....................\................\sensor_hub
....................\................\..........\.vdbs
....................\................\..........\.....\sensor_hub.vdb
....................\................\..........\sensor_hub.arearep
....................\................\..........\sensor_hub_drc.log
....................\................\..........\sensor_hub_for_lpf.sdc
....................\................\..........\sensor_hub_gatelevel.v.ve
....................\................\..........\sensor_hub_Implmnt
....................\................\..........\..................\sbt
....................\................\..........\..................\...\constraint
....................\................\..........\..................\...\Log
....................\................\..........\..................\...\...\iceCube0.log
....................\................\..........\..................\...\...\iceCube1.log
....................\................\..........\..................\...\...\iceCube2.log
....................\................\..........\..................\...\netlist
....................\................\..........\..................\...\.......\oadb-sensor_hub
....................\................\..........\..................\...\.......\...............\BFPGA_DESIGN_ep
....................\................\..........\..................\...\.......\...............\...............\.oalib
....................\................\..........\..................\...\.......\...............\...............\sensor_hub
....................\................\..........\..................\...\.......\...............\...............\..........\%I%N%T%E%R%F%A%C%E
....................\................\..........\..................\...\.......\...............\...............\..........\..................\master.tag
....................\................\..........\..................\...\.......\...............\...............\..........\..................\netlist.oa
....................\................\..........\..................\...\.......\...............\BFPGA_DESIGN_pk
....................\................\..........\..................\...\.......\...............\...............\.oalib
....................\................\..........\..................\...\.......\...............\...............\sensor_hub
....................\................\..........\..................\...\.......\...............\...............\..........\%I%N%T%E%R%F%A%C%E
....................\................\..........\..................\...\.......\...............\...............\..........\..................\master.tag
....................\................\..........\..................\...\.......\...............\...............\..........\..................\netlist.oa
....................\................\..........\..................\...\.......\...............\BFPGA_DESIGN_pl
....................\................\..........\..................\...\.......\...............\...............\.oalib
....................\................\..........\..................\...\.......\...............\...............\sensor_hub
....................\................\..........\..................\...\.......\...............\...............\..........\%I%N%T%E%R%F%A%C%E
....................\................\..........\..................\...\.......\...............\...............\..........\..................\master.tag
....................\................\..........\..................\...\.......\...............\...............\..........\..................\netlist.oa
....................\................\..........\..................\...\.......\...............\BFPGA_DESIGN_rr
....................\................\..........\..................\...\.......\...............\...............\.oalib
....................\................\..........\..................\...\.......\...............\...............\sensor_hub
...........