文件名称:EDAprogram
介绍说明－－下载内容均来自于网络，请自行研究使用
电子密码锁的设计，其中含程序图和流程各种东西-Design of electronic locks, which contains the program flow diagram and all sorts of things
(系统自动生成,下载前可以参看下载内容)
下载文件列表
EDAprogram
..........\CTRL
..........\....\CTRL.SchLib
..........\....\CTRL.Vhd
..........\....\FPGA_Project3.PrjFpg
..........\....\FPGA_Project3.SO
..........\....\History
..........\....\.......\CTRL.~(1).Vhd.Zip
..........\....\.......\CTRL.~(2).Vhd.Zip
..........\....\.......\CTRL.~(3).Vhd.Zip
..........\....\.......\CTRL.~(4).Vhd.Zip
..........\....\.......\FPGA_Project3.~(1).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(2).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(3).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(4).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(5).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(6).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(7).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(8).PrjFpg.Zip
..........\....\.......\FPGA_Project3.~(9).PrjFpg.Zip
..........\....\.......\Test_ctrl.~(1).VHDTST.Zip
..........\....\.......\Test_ctrl.~(2).VHDTST.Zip
..........\....\.......\Test_ctrl.~(3).VHDTST.Zip
..........\....\ProjectOutputs
..........\....\..............\CTRL.AN
..........\....\..............\FPGA_Project3.AL
..........\....\..............\Test_ctrl.AN
..........\....\..............\Test_ctrl.DP
..........\....\..............\Test_ctrl.VX
..........\....\..............\results.txt
..........\....\Schlib1.SchLib
..........\....\Test_ctrl.VHDTST
..........\DZMMS
..........\.....\CTRL.AN
..........\.....\CTRL.SchLib
..........\.....\CTRL.Vhd
..........\.....\FPGA_PROJECT1.PRJFPG
..........\.....\FPGA_Project1.PrjFpgStructure
..........\.....\FPGA_Project1.SO
..........\.....\GENLCD8.SchLib
..........\.....\GENLCD8.Vhd
..........\.....\History
..........\.....\.......\CTRL.~(1).Vhd.Zip
..........\.....\.......\CTRL.~(13).Vhd.Zip
..........\.....\.......\CTRL.~(14).Vhd.Zip
..........\.....\.......\CTRL.~(15).Vhd.Zip
..........\.....\.......\CTRL.~(16).Vhd.Zip
..........\.....\.......\CTRL.~(17).Vhd.Zip
..........\.....\.......\CTRL.~(18).Vhd.Zip
..........\.....\.......\CTRL.~(19).Vhd.Zip
..........\.....\.......\CTRL.~(2).Vhd.Zip
..........\.....\.......\CTRL.~(20).Vhd.Zip
..........\.....\.......\CTRL.~(21).Vhd.Zip
..........\.....\.......\CTRL.~(22).Vhd.Zip
..........\.....\.......\CTRL.~(23).Vhd.Zip
..........\.....\.......\CTRL.~(24).Vhd.Zip
..........\.....\.......\CTRL.~(25).Vhd.Zip
..........\.....\.......\CTRL.~(26).Vhd.Zip
..........\.....\.......\CTRL.~(27).Vhd.Zip
..........\.....\.......\CTRL.~(28).Vhd.Zip
..........\.....\.......\CTRL.~(29).Vhd.Zip
..........\.....\.......\CTRL.~(3).Vhd.Zip
..........\.....\.......\CTRL.~(30).Vhd.Zip
..........\.....\.......\CTRL.~(31).Vhd.Zip
..........\.....\.......\CTRL.~(4).Vhd.Zip
..........\.....\.......\CTRL.~(5).Vhd.Zip
..........\.....\.......\CTRL.~(6).Vhd.Zip
..........\.....\.......\CTRL.~(7).Vhd.Zip
..........\.....\.......\CTRL.~(8).Vhd.Zip
..........\.....\.......\CTRL.~(9).Vhd.Zip
..........\.....\.......\FPGA_PROJECT1.~(39).PRJFPG.Zip
..........\.....\.......\FPGA_PROJECT1.~(40).PRJFPG.Zip
..........\.....\.......\FPGA_Project1.~(1).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(1).SO.Zip
..........\.....\.......\FPGA_Project1.~(12).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(13).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(14).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(15).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(16).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(17).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(18).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(19).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(2).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(2).SO.Zip
..........\.....\.......\FPGA_Project1.~(20).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(21).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(22).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(23).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(24).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(25).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(26).PrjFpg.Zip
..........\.....\.......\FPGA_Project1.~(27).PrjFpg.Zip
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