文件名称:i2c_module
介绍说明－－下载内容均来自于网络，请自行研究使用
这是本人的i2c主从模块，均通过本人的工程验证，值得推荐，大家可以参考参考。-this is my i2c master and slave module,all
can download it see see
can download it see see
(系统自动生成,下载前可以参看下载内容)
下载文件列表
i2c_module\debussy.bat
..........\Debussy.exeLog\compiler.log
..........\..............\Debussy.exe.cmd
..........\..............\Debussy.exe.cmd.bak
..........\..............\novas.rc
..........\..............\ToNetlist.log
..........\..............\turbo.log
..........\i2c_cmd.v
..........\i2c_cmd.v.bak
..........\i2c_master.v
..........\i2c_master.v.bak
..........\i2c_slave.v
..........\i2c_slave.v.bak
..........\modelsim.bat
..........\novas.rc
..........\sim.do
..........\sim.do.bak
..........\test.log
..........\test.v
..........\test.v.bak
..........\transcript
..........\vfile.f
..........\vfile.f.bak
..........\vsim.wlf
..........\work\@d@p@r16@x4@c\verilog.asm
..........\....\.............\_primary.dat
..........\....\.............\_primary.vhd
..........\....\.i@n@v\verilog.asm
..........\....\......\_primary.dat
..........\....\......\_primary.vhd
..........\....\.m@u@x161\verilog.asm
..........\....\.........\_primary.dat
..........\....\.........\_primary.vhd
..........\....\.r@o@m16@x1@a\verilog.asm
..........\....\.............\_primary.dat
..........\....\.............\_primary.vhd
..........\....\.v@h@i\verilog.asm
..........\....\......\_primary.dat
..........\....\......\_primary.vhd
..........\....\...l@o\verilog.asm
..........\....\......\_primary.dat
..........\....\......\_primary.vhd
..........\....\cmd_decoder\verilog.asm
..........\....\...........\_primary.dat
..........\....\...........\_primary.vhd
..........\....\i2c_cmd\verilog.asm
..........\....\.......\_primary.dat
..........\....\.......\_primary.vhd
..........\....\....master\verilog.asm
..........\....\..........\_primary.dat
..........\....\..........\_primary.vhd
..........\....\....slave\verilog.asm
..........\....\.........\_primary.dat
..........\....\.........\_primary.vhd
..........\....\sw_cmd_ram\verilog.asm
..........\....\..........\_primary.dat
..........\....\..........\_primary.vhd
..........\....\test\verilog.asm
..........\....\....\_primary.dat
..........\....\....\_primary.vhd
..........\....\_info
..........\....\@d@p@r16@x4@c
..........\....\@i@n@v
..........\....\@m@u@x161
..........\....\@r@o@m16@x1@a
..........\....\@v@h@i
..........\....\@v@l@o
..........\....\cmd_decoder
..........\....\i2c_cmd
..........\....\i2c_master
..........\....\i2c_slave
..........\....\sw_cmd_ram
..........\....\test
..........\....\_temp
..........\Debussy.exeLog
..........\work
i2c_module