文件名称:Verilog-Digital-control
- 所属分类：
- VHDL编程
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2014-06-27
- 文件大小：
- 11.25mb
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- 0次
- 提 供 者：
- gengh*****
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- 无
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Verilog HDL数字控制系统设计实-冼进-源代码-4469-Verilog HDL digital control system design implementation- Xian Jin- source code-4469
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下载文件列表
Verilog HDL数字控制系统设计实-冼进-源代码-4469\1\counter_4_bit\cmp_state.ini
..............................................\.\.............\counter_4_bit.asm.rpt
..............................................\.\.............\counter_4_bit.done
..............................................\.\.............\counter_4_bit.fit.eqn
..............................................\.\.............\counter_4_bit.fit.rpt
..............................................\.\.............\counter_4_bit.fit.summary
..............................................\.\.............\counter_4_bit.flow.rpt
..............................................\.\.............\counter_4_bit.map.eqn
..............................................\.\.............\counter_4_bit.map.rpt
..............................................\.\.............\counter_4_bit.map.summary
..............................................\.\.............\counter_4_bit.pin
..............................................\.\.............\counter_4_bit.pof
..............................................\.\.............\counter_4_bit.qpf
..............................................\.\.............\counter_4_bit.qsf
..............................................\.\.............\counter_4_bit.qws
..............................................\.\.............\counter_4_bit.sim.rpt
..............................................\.\.............\counter_4_bit.tan.rpt
..............................................\.\.............\counter_4_bit.tan.summary
..............................................\.\.............\counter_4_bit.v
..............................................\.\.............\counter_4_bit.vwf
..............................................\.\.............\db\counter_4_bit.asm.qmsg
..............................................\.\.............\..\counter_4_bit.cmp.cdb
..............................................\.\.............\..\counter_4_bit.cmp.ddb
..............................................\.\.............\..\counter_4_bit.cmp.hdb
..............................................\.\.............\..\counter_4_bit.cmp.rdb
..............................................\.\.............\..\counter_4_bit.cmp.tdb
..............................................\.\.............\..\counter_4_bit.cmp0.ddb
..............................................\.\.............\..\counter_4_bit.db_info
..............................................\.\.............\..\counter_4_bit.eco.cdb
..............................................\.\.............\..\counter_4_bit.eds_overflow
..............................................\.\.............\..\counter_4_bit.fit.qmsg
..............................................\.\.............\..\counter_4_bit.hier_info
..............................................\.\.............\..\counter_4_bit.hif
..............................................\.\.............\..\counter_4_bit.map.cdb
..............................................\.\.............\..\counter_4_bit.map.hdb
..............................................\.\.............\..\counter_4_bit.map.qmsg
..............................................\.\.............\..\counter_4_bit.pre_map.cdb
..............................................\.\.............\..\counter_4_bit.pre_map.hdb
..............................................\.\.............\..\counter_4_bit.psp
..............................................\.\.............\..\counter_4_bit.rtlv.hdb
..............................................\.\.............\..\counter_4_bit.rtlv_sg.cdb
..............................................\.\.............\..\counter_4_bit.rtlv_sg_swap.cdb
..............................................\.\.............\..\counter_4_bit.sgdiff.cdb
..............................................\.\.............\..\counter_4_bit.sgdiff.hdb
..............................................\.\.............\..\counter_4_bit.sim.hdb
..............................................\.\.............\..\counter_4_bit.sim.qmsg
..............................................\.\.............\..\counter_4_bit.sim.rdb
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