文件名称:BCH_EN
介绍说明－－下载内容均来自于网络，请自行研究使用
基于FPGA的GPS/BD信号发生器中BCH编码发生器模块，使用verilog编写-
FPGA-based GPS/BD signal generator BCH code generator module, using verilog write
FPGA-based GPS/BD signal generator BCH code generator module, using verilog write
(系统自动生成,下载前可以参看下载内容)
下载文件列表
BCH_EN\BCH_EN.asm.rpt
......\BCH_EN.done
......\BCH_EN.eda.rpt
......\BCH_EN.fit.rpt
......\BCH_EN.fit.smsg
......\BCH_EN.fit.summary
......\BCH_EN.flow.rpt
......\BCH_EN.jdi
......\BCH_EN.map.rpt
......\BCH_EN.map.summary
......\BCH_EN.pin
......\BCH_EN.qpf
......\BCH_EN.qsf
......\BCH_EN.qws
......\BCH_EN.sof
......\BCH_EN.sta.rpt
......\BCH_EN.sta.summary
......\BCH_EN.v
......\BCH_EN.v.bak
......\BCH_EN_assignment_defaults.qdf
......\BCH_EN_nativelink_simulation.rpt
......\db\BCH_EN.amm.cdb
......\..\BCH_EN.asm.qmsg
......\..\BCH_EN.asm.rdb
......\..\BCH_EN.asm_labs.ddb
......\..\BCH_EN.cbx.xml
......\..\BCH_EN.cmp.bpm
......\..\BCH_EN.cmp.cdb
......\..\BCH_EN.cmp.hdb
......\..\BCH_EN.cmp.kpt
......\..\BCH_EN.cmp.logdb
......\..\BCH_EN.cmp.rdb
......\..\BCH_EN.cmp_merge.kpt
......\..\BCH_EN.db_info
......\..\BCH_EN.eda.qmsg
......\..\BCH_EN.fit.qmsg
......\..\BCH_EN.hier_info
......\..\BCH_EN.hif
......\..\BCH_EN.idb.cdb
......\..\BCH_EN.lpc.html
......\..\BCH_EN.lpc.rdb
......\..\BCH_EN.lpc.txt
......\..\BCH_EN.map.bpm
......\..\BCH_EN.map.cdb
......\..\BCH_EN.map.hdb
......\..\BCH_EN.map.kpt
......\..\BCH_EN.map.logdb
......\..\BCH_EN.map.qmsg
......\..\BCH_EN.map.rdb
......\..\BCH_EN.map_bb.cdb
......\..\BCH_EN.map_bb.hdb
......\..\BCH_EN.map_bb.logdb
......\..\BCH_EN.pre_map.cdb
......\..\BCH_EN.pre_map.hdb
......\..\BCH_EN.root_partition.map.reg_db.cdb
......\..\BCH_EN.routing.rdb
......\..\BCH_EN.rtlv.hdb
......\..\BCH_EN.rtlv_sg.cdb
......\..\BCH_EN.rtlv_sg_swap.cdb
......\..\BCH_EN.sgdiff.cdb
......\..\BCH_EN.sgdiff.hdb
......\..\BCH_EN.sld_design_entry.sci
......\..\BCH_EN.sld_design_entry_dsc.sci
......\..\BCH_EN.smart_action.txt
......\..\BCH_EN.sta.qmsg
......\..\BCH_EN.sta.rdb
......\..\BCH_EN.sta_cmp.6_slow_1200mv_85c.tdb
......\..\BCH_EN.stingray_io_sim_cache.99um_ff_1200mv_0c_fast.hsd
......\..\BCH_EN.stingray_io_sim_cache.99um_tt_1200mv_0c_slow.hsd
......\..\BCH_EN.stingray_io_sim_cache.99um_tt_1200mv_85c_slow.hsd
......\..\BCH_EN.syn_hier_info
......\..\BCH_EN.tiscmp.fast_1200mv_0c.ddb
......\..\BCH_EN.tiscmp.slow_1200mv_0c.ddb
......\..\BCH_EN.tiscmp.slow_1200mv_85c.ddb
......\..\BCH_EN.tis_db_list.ddb
......\..\BCH_EN.tmw_info
......\..\logic_util_heursitic.dat
......\..\prev_cmp_BCH_EN.qmsg
......\incremental_db\compiled_partitions\BCH_EN.db_info
......\..............\...................\BCH_EN.root_partition.cmp.cdb
......\..............\...................\BCH_EN.root_partition.cmp.dfp
......\..............\...................\BCH_EN.root_partition.cmp.hdb
......\..............\...................\BCH_EN.root_partition.cmp.kpt
......\..............\...................\BCH_EN.root_partition.cmp.logdb
......\..............\...................\BCH_EN.root_partition.cmp.rcfdb
......\..............\...................\BCH_EN.root_partition.map.cdb
......\..............\...................\BCH_EN.root_partition.map.dpi
......\..............\...................\BCH_EN.root_partition.map.hbdb.cdb
......\..............\...................\BCH_EN.root_partition.map.hbdb.hb_info
......\..............\...................\BCH_EN.root_partition.map.hbdb.hdb
......\..............\...................\BCH_EN.root_partition.map.hbdb.sig
......\..............\...................\BCH_EN.root_partition.map.hdb
......\..............\...................\BCH_EN.root_partition.map.kpt
......\..............\README
......\simulation\modelsim\BCH_EN.sft
......\..........\........\BCH_EN.vo
......\..........\........\BCH_EN.vt
......\..........\........\BCH_EN.vt.bak
......\..........\........\BCH_EN_6_1200mv_0c_slow.vo
......\..........\........\BCH_EN_6_1200mv_0c_v_slow.sdo