文件名称:ug480-ver1.5
介绍说明－－下载内容均来自于网络，请自行研究使用
利用实验板上的XADC资源，对芯片温度、内部电源进行定时采集和监控，并把信息存入blockram,可实现翻看，并有按键消抖模块-XADC resource use experimental board, the chip temperature, the internal power supply timing collection and monitoring, and put information into blockram, look can be achieved, and a key debounce module
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ug480-ver1.5\.Xil\PlanAhead-6216-PC201402151702\ngc2edif\ngc2edif.log
............\....\.............................\........\_xmsgs\ngc2edif.xmsgs
............\....\............28-PC201402151702\ngc2edif\IP_ram.edif
............\AA.v
............\AA_isim_beh.exe
............\AA_stx_beh.prj
............\aw.v
............\blockram.v
............\blockram_envsettings.html
............\blockram_summary.html
............\dfsdf.v
............\dfsdf_beh.prj
............\dfsdf_isim_beh.exe
............\dfsdf_isim_beh.wdb
............\dfsdf_stx_beh.prj
............\fenpin.lso
............\fenpin.v
............\fuse.log
............\fuse.xmsgs
............\fuseRelaunch.cmd
............\gggg.v
............\gggg.vhd
............\gggg_beh.prj
............\gggg_isim_beh.exe
............\gggg_isim_beh.wdb
............\gggg_stx_beh.prj
............\ipcore_dir\blockram.asy
............\..........\blockram.gise
............\..........\blockram.sym
............\..........\blockram.veo
............\..........\blockram.xise
............\..........\blockram_xmdf.tcl
............\..........\check_versions.tcl
............\..........\coregen.cgp
............\..........\coregen.log
............\..........\core_resources.txt
............\..........\create_blockram.tcl
............\..........\create_Dualram.tcl
............\..........\create_IP_bram.tcl
............\..........\create_IP_div.tcl
............\..........\create_IP_inst.tcl
............\..........\create_IP_mul.tcl
............\..........\create_IP_multiply.tcl
............\..........\create_IP_ram.tcl
............\..........\create_IP_xadc.tcl
............\..........\create_xadc.tcl
............\..........\Dualram.asy
............\..........\Dualram.gise
............\..........\dualram.ncf
............\..........\Dualram.sym
............\..........\Dualram.veo
............\..........\Dualram.xise
............\..........\Dualram_xmdf.tcl
............\..........\edit_blockram.tcl
............\..........\edit_Dualram.tcl
............\..........\edit_IP_inst.tcl
............\..........\edit_IP_mul.tcl
............\..........\edit_IP_multiply.tcl
............\..........\edit_IP_ram.tcl
............\..........\edit_IP_xadc.tcl
............\..........\gui_latency.txt
............\..........\IP_bram\blk_mem_gen_v7_3_readme.txt
............\..........\.......\doc\blk_mem_gen_v7_3_vinfo.html
............\..........\.......\...\pg058-blk-mem-gen.pdf
............\..........\.......\example_design\IP_bram_exdes.ucf
............\..........\.......\..............\IP_bram_exdes.vhd
............\..........\.......\..............\IP_bram_exdes.xdc
............\..........\.......\..............\IP_bram_prod.vhd
............\..........\.......\implement\implement.bat
............\..........\.......\.........\implement.sh
............\..........\.......\.........\planAhead_ise.bat
............\..........\.......\.........\planAhead_ise.sh
............\..........\.......\.........\planAhead_ise.tcl
............\..........\.......\.........\xst.prj
............\..........\.......\.........\xst.scr
............\..........\.......\simulation\addr_gen.vhd
............\..........\.......\..........\bmg_stim_gen.vhd
............\..........\.......\..........\bmg_tb_pkg.vhd
............\..........\.......\..........\checker.vhd
............\..........\.......\..........\data_gen.vhd
............\..........\.......\..........\functional\simcmds.tcl
............\..........\.......\..........\..........\simulate_isim.bat
............\..........\.......\..........\..........\simulate_mti.bat
............\..........\.......\..........\..........\simulate_mti.do
............\..........\.......\..........\..........\simulate_mti.sh
............\..........\.......\..........\..........\simulate_ncsim.sh
............\..........\.......\..........\..........\simulate_vcs.sh
............\..........\.......\..........\..........\ucli_commands.key
............\..........\.......\..........\..........\vcs_session.tcl
............\..........\.......\..........\..........\wave_mti.do
............\..........\.......\......