文件名称:UART_FIFO

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-06-12
  • 文件大小:
  • 686kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 李**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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Verilog编写的串口配合FIFO的代码,对大家学习串口和FIFO有一定帮助-Verilog prepared with FIFO serial code, we learn the serial port and FIFO have some help
(系统自动生成,下载前可以参看下载内容)

下载文件列表





UART_FIFO

.........\FIFO.bsf

.........\FIFO.qip

.........\FIFO.v

.........\FIFO_bb.v

.........\FIFO_inst.v

.........\FIFO_wave0.jpg

.........\FIFO_wave1.jpg

.........\FIFO_waveforms.html

.........\UART_FIFO.asm.rpt

.........\UART_FIFO.cdf

.........\UART_FIFO.done

.........\UART_FIFO.dpf

.........\UART_FIFO.eda.rpt

.........\UART_FIFO.fit.rpt

.........\UART_FIFO.fit.smsg

.........\UART_FIFO.fit.summary

.........\UART_FIFO.flow.rpt

.........\UART_FIFO.map.rpt

.........\UART_FIFO.map.smsg

.........\UART_FIFO.map.summary

.........\UART_FIFO.pin

.........\UART_FIFO.pof

.........\UART_FIFO.qpf

.........\UART_FIFO.qsf

.........\UART_FIFO.qws

.........\UART_FIFO.sof

.........\UART_FIFO.tan.rpt

.........\UART_FIFO.tan.summary

.........\UART_FIFO.v

.........\UART_FIFO.v.bak

.........\datagene.v

.........\datagene.v.bak

.........\db

.........\..\UART_FIFO.asm.qmsg

.........\..\UART_FIFO.cbx.xml

.........\..\UART_FIFO.cmp.bpm

.........\..\UART_FIFO.cmp.cdb

.........\..\UART_FIFO.cmp.ecobp

.........\..\UART_FIFO.cmp.hdb

.........\..\UART_FIFO.cmp.kpt

.........\..\UART_FIFO.cmp.logdb

.........\..\UART_FIFO.cmp.rdb

.........\..\UART_FIFO.cmp.tdb

.........\..\UART_FIFO.cmp0.ddb

.........\..\UART_FIFO.cmp_merge.kpt

.........\..\UART_FIFO.db_info

.........\..\UART_FIFO.eco.cdb

.........\..\UART_FIFO.eda.qmsg

.........\..\UART_FIFO.fit.qmsg

.........\..\UART_FIFO.hier_info

.........\..\UART_FIFO.hif

.........\..\UART_FIFO.lpc.html

.........\..\UART_FIFO.lpc.rdb

.........\..\UART_FIFO.lpc.txt

.........\..\UART_FIFO.map.bpm

.........\..\UART_FIFO.map.cdb

.........\..\UART_FIFO.map.ecobp

.........\..\UART_FIFO.map.hdb

.........\..\UART_FIFO.map.kpt

.........\..\UART_FIFO.map.logdb

.........\..\UART_FIFO.map.qmsg

.........\..\UART_FIFO.map_bb.cdb

.........\..\UART_FIFO.map_bb.hdb

.........\..\UART_FIFO.map_bb.logdb

.........\..\UART_FIFO.pre_map.cdb

.........\..\UART_FIFO.pre_map.hdb

.........\..\UART_FIFO.rpp.qmsg

.........\..\UART_FIFO.rtlv.hdb

.........\..\UART_FIFO.rtlv_sg.cdb

.........\..\UART_FIFO.rtlv_sg_swap.cdb

.........\..\UART_FIFO.sgate.rvd

.........\..\UART_FIFO.sgate_sm.rvd

.........\..\UART_FIFO.sgdiff.cdb

.........\..\UART_FIFO.sgdiff.hdb

.........\..\UART_FIFO.sld_design_entry.sci

.........\..\UART_FIFO.sld_design_entry_dsc.sci

.........\..\UART_FIFO.syn_hier_info

.........\..\UART_FIFO.tan.qmsg

.........\..\UART_FIFO.tis_db_list.ddb

.........\..\UART_FIFO.tmw_info

.........\..\UART_FIFO_global_asgn_op.abo

.........\..\a_dpfifo_c671.tdf

.........\..\a_dpfifo_pn61.tdf

.........\..\a_fefifo_18e.tdf

.........\..\altsyncram_egl1.tdf

.........\..\cntr_bc7.tdf

.........\..\cntr_vbb.tdf

.........\..\dpram_4351.tdf

.........\..\prev_cmp_UART_FIFO.asm.qmsg

.........\..\prev_cmp_UART_FIFO.eda.qmsg

.........\..\prev_cmp_UART_FIFO.fit.qmsg

.........\..\prev_cmp_UART_FIFO.map.qmsg

.........\..\prev_cmp_UART_FIFO.qmsg

.........\..\prev_cmp_UART_FIFO.tan.qmsg

.........\..\scfifo_5071.tdf

.........\..\scfifo_ih61.tdf

.........\incremental_db

.........\..............\README

.........\..............\compiled_partitions

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