文件名称:SDRAM_FPGA
- 所属分类：
- 并行运算
- 资源属性：
- [VHDL] [源码]
- 上传时间：
- 2013-06-15
- 文件大小：
- 2.82mb
- 下载次数：
- 0次
- 提 供 者：
- zhangq*******
- 相关连接：
- 无
- 下载说明：
- 别用迅雷下载，失败请重下，重下不扣分！
介绍说明－－下载内容均来自于网络，请自行研究使用
这个是SDRAM的控制程序，包括包括UART和FIFO模块，适合FPGA开发人员看，也适合初学者学习。-This is the SDRAM control procedures, including including UART and FIFO module, suitable for FPGA developers look, but also suitable for beginners to learn.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ex9
...\reference_verilog
...\.................\README.v
...\.................\SDRSD50_071010.v
...\sdram_mdl
...\.........\PLL_ctrl.bsf
...\.........\PLL_ctrl.ppf
...\.........\PLL_ctrl.qip
...\.........\PLL_ctrl.v
...\.........\PLL_ctrl_bb.v
...\.........\PLL_ctrl_inst.v
...\.........\PLL_ctrl_wave0.jpg
...\.........\PLL_ctrl_waveforms.html
...\.........\datagene.v
...\.........\datagene.v.bak
...\.........\db
...\.........\..\a_fefifo_ctc.tdf
...\.........\..\a_fefifo_htc.tdf
...\.........\..\a_gray2bin_q4b.tdf
...\.........\..\a_graycounter_u06.tdf
...\.........\..\add_sub_918.tdf
...\.........\..\add_sub_gub.tdf
...\.........\..\add_sub_se8.tdf
...\.........\..\alt_sync_fifo_0fm.tdf
...\.........\..\alt_sync_fifo_0oi.tdf
...\.........\..\alt_synch_pipe_oc8.tdf
...\.........\..\alt_synch_pipe_pc8.tdf
...\.........\..\altsyncram_1lh1.tdf
...\.........\..\cntr_cta.tdf
...\.........\..\cntr_kua.tdf
...\.........\..\dcfifo_35l1.tdf
...\.........\..\dcfifo_o2l1.tdf
...\.........\..\dffpipe_gd9.tdf
...\.........\..\dffpipe_id9.tdf
...\.........\..\dffpipe_jd9.tdf
...\.........\..\dpram_6o31.tdf
...\.........\..\logic_util_heursitic.dat
...\.........\..\prev_cmp_sdr_test.asm.qmsg
...\.........\..\prev_cmp_sdr_test.eda.qmsg
...\.........\..\prev_cmp_sdr_test.fit.qmsg
...\.........\..\prev_cmp_sdr_test.map.qmsg
...\.........\..\prev_cmp_sdr_test.qmsg
...\.........\..\prev_cmp_sdr_test.sta.qmsg
...\.........\..\sdr_test.amm.cdb
...\.........\..\sdr_test.asm.qmsg
...\.........\..\sdr_test.asm.rdb
...\.........\..\sdr_test.atom.rvd
...\.........\..\sdr_test.cbx.xml
...\.........\..\sdr_test.cmp.bpm
...\.........\..\sdr_test.cmp.cdb
...\.........\..\sdr_test.cmp.hdb
...\.........\..\sdr_test.cmp.kpt
...\.........\..\sdr_test.cmp.logdb
...\.........\..\sdr_test.cmp.rdb
...\.........\..\sdr_test.cmp0.ddb
...\.........\..\sdr_test.cmp_merge.kpt
...\.........\..\sdr_test.db_info
...\.........\..\sdr_test.eda.qmsg
...\.........\..\sdr_test.fit.qmsg
...\.........\..\sdr_test.hier_info
...\.........\..\sdr_test.hif
...\.........\..\sdr_test.idb.cdb
...\.........\..\sdr_test.lpc.html
...\.........\..\sdr_test.lpc.rdb
...\.........\..\sdr_test.lpc.txt
...\.........\..\sdr_test.map.bpm
...\.........\..\sdr_test.map.cdb
...\.........\..\sdr_test.map.hdb
...\.........\..\sdr_test.map.kpt
...\.........\..\sdr_test.map.logdb
...\.........\..\sdr_test.map.qmsg
...\.........\..\sdr_test.map_bb.cdb
...\.........\..\sdr_test.map_bb.hdb
...\.........\..\sdr_test.map_bb.logdb
...\.........\..\sdr_test.pow.qmsg
...\.........\..\sdr_test.pre_map.cdb
...\.........\..\sdr_test.pre_map.hdb
...\.........\..\sdr_test.rpp.qmsg
...\.........\..\sdr_test.rtlv.hdb
...\.........\..\sdr_test.rtlv_sg.cdb
...\.........\..\sdr_test.rtlv_sg_swap.cdb
...\.........\..\sdr_test.sgate.rvd
...\.........\..\sdr_test.sgate_sm.rvd
...\.........\..\sdr_test.sgdiff.cdb
...\.........\..\sdr_test.sgdiff.hdb
...\.........\..\sdr_test.sld_design_entry.sci
...\.........\..\sdr_test.sld_design_entry_dsc.sci
...\.........\..\sdr_test.smart_action.txt
...\.........\..\sdr_test.smp_dump.txt
...\.........\..\sdr_test.sta.qmsg
...\.........\..\sdr_test.sta.rdb
...\.........\..\sdr_test.sta_cmp.8_slow.tdb
...\.........\..\sdr_test.syn_hier_info
...\.........\..\sdr_test.tis_db_list.ddb
...\.........\..\sdr_test_global_asgn_op.abo
...\.........\greybox_tmp
...\.........\...........\cbx_args.txt
...\.........\incremental_db
...\.........\..............\README
...\.........\..............\compiled_partitions