文件名称:ds_test12
介绍说明－－下载内容均来自于网络，请自行研究使用
在Verilog语言下用FPGA驱动DS18B20，带数码管显示，带LED报警，有报警值调整功能。这个是本人调过的，原版调通代码没改的，绝对能跑通。建议用QuatusII全编译后看一下RTL图就能理解程序是怎么工作的。-A Demo of DS18B20 on FPGA.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
ds_test12
.........\.qsys_edit
.........\..........\filters.xml
.........\..........\preferences.xml
.........\1_5.v
.........\1_5.v.bak
.........\clk_1ms.v
.........\clk_1ms.v.bak
.........\clk_1s.v
.........\clk_1s.v.bak
.........\clk_1us.v
.........\clk_1us.v.bak
.........\data_cahange.v
.........\data_cahange.v.bak
.........\db
.........\..\add_sub_7pc.tdf
.........\..\add_sub_8pc.tdf
.........\..\add_sub_ngh.tdf
.........\..\add_sub_rgh.tdf
.........\..\altsyncram_au14.tdf
.........\..\altsyncram_eu14.tdf
.........\..\altsyncram_iu14.tdf
.........\..\alt_u_div_07f.tdf
.........\..\alt_u_div_67f.tdf
.........\..\alt_u_div_o9f.tdf
.........\..\cmpr_ngc.tdf
.........\..\cmpr_qgc.tdf
.........\..\cmpr_sgc.tdf
.........\..\cntr_23j.tdf
.........\..\cntr_egi.tdf
.........\..\cntr_fgi.tdf
.........\..\cntr_hgi.tdf
.........\..\cntr_i6j.tdf
.........\..\cntr_jgi.tdf
.........\..\decode_dvf.tdf
.........\..\led.amm.cdb
.........\..\led.asm.qmsg
.........\..\led.asm.rdb
.........\..\led.asm_labs.ddb
.........\..\led.cbx.xml
.........\..\led.cmp.bpm
.........\..\led.cmp.cdb
.........\..\led.cmp.hdb
.........\..\led.cmp.kpt
.........\..\led.cmp.logdb
.........\..\led.cmp.rdb
.........\..\led.cmp_merge.kpt
.........\..\led.cycloneive_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
.........\..\led.cycloneive_io_sim_cache.45um_ss_1200mv_0c_slow.hsd
.........\..\led.cycloneive_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
.........\..\led.db_info
.........\..\led.fit.qmsg
.........\..\led.hier_info
.........\..\led.hif
.........\..\led.idb.cdb
.........\..\led.lpc.html
.........\..\led.lpc.rdb
.........\..\led.lpc.txt
.........\..\led.map.bpm
.........\..\led.map.cdb
.........\..\led.map.hdb
.........\..\led.map.kpt
.........\..\led.map.logdb
.........\..\led.map.qmsg
.........\..\led.map_bb.cdb
.........\..\led.map_bb.hdb
.........\..\led.map_bb.logdb
.........\..\led.pre_map.cdb
.........\..\led.pre_map.hdb
.........\..\led.rpp.qmsg
.........\..\led.rtlv.hdb
.........\..\led.rtlv_sg.cdb
.........\..\led.rtlv_sg_swap.cdb
.........\..\led.sgate.rvd
.........\..\led.sgate_sm.rvd
.........\..\led.sgdiff.cdb
.........\..\led.sgdiff.hdb
.........\..\led.sld_design_entry.sci
.........\..\led.sld_design_entry_dsc.sci
.........\..\led.smart_action.txt
.........\..\led.smp_dump.txt
.........\..\led.sta.qmsg
.........\..\led.sta.rdb
.........\..\led.sta_cmp.8_slow_1200mv_85c.tdb
.........\..\led.syn_hier_info
.........\..\led.tiscmp.fastest_slow_1200mv_0c.ddb
.........\..\led.tiscmp.fastest_slow_1200mv_85c.ddb
.........\..\led.tiscmp.fast_1200mv_0c.ddb
.........\..\led.tiscmp.slow_1200mv_0c.ddb
.........\..\led.tiscmp.slow_1200mv_85c.ddb
.........\..\led.tis_db_list.ddb
.........\..\logic_util_heursitic.dat
.........\..\lpm_divide_1bm.tdf
.........\..\lpm_divide_1jm.tdf
.........\..\lpm_divide_akm.tdf
.........\..\lpm_divide_uim.tdf
.........\..\mux_ssc.tdf
.........\..\prev_cmp_led.qmsg
.........\..\sign_div_unsign_2nh.tdf
.........\..\sign_div_unsign_mlh.tdf