文件名称:CycloneIII_EP3C40F780C8_18_PS2_KB

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [MacOS] [C/C++] [源码]
  • 上传时间:
  • 2013-05-22
  • 文件大小:
  • 2.18mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • leiy****
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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SOPC,CycloneIII系列芯片EP3C40F780C8,NIOS II IDE,PS2_KB实验代码-SOPC,CycloneIII,EP3C40F780C8,NIOS II IDE,PS2_KB CODE
(系统自动生成,下载前可以参看下载内容)

下载文件列表





Exp18_PS2_KB\.metadata\.lock

............\.........\.log

............\.........\.plugins\com.altera.nj.ui\dialog_settings.xml

............\.........\........\org.eclipse.cdt.core\.log

............\.........\........\....................\savedIndexNames.txt

............\.........\........\................make.core\specs.c

............\.........\........\.........................\specs.cpp

............\.........\........\................ui\dialog_settings.xml

............\.........\........\.............ore.resources\.history\.index

............\.........\........\..........................\.root\1.tree

............\.........\........\..........................\.safetable\org.eclipse.core.resources

............\.........\........\..................untime\.settings\org.eclipse.cdt.core.prefs

............\.........\........\........................\.........\org.eclipse.cdt.debug.core.prefs

............\.........\........\........................\.........\org.eclipse.cdt.ui.prefs

............\.........\........\........................\.........\org.eclipse.ui.prefs

............\.........\........\............ui\dialog_settings.xml

............\.........\........\...............ide\dialog_settings.xml

............\.........\........\...............workbench\dialog_settings.xml

............\.........\........\........................\workbench.xml

............\.........\myCPU_sim\atail-f.pl

............\.........\.........\bht_ram.dat

............\.........\.........\bht_ram.hex

............\.........\.........\CPU_ociram_default_contents.dat

............\.........\.........\CPU_ociram_default_contents.hex

............\.........\.........\create_myCPU_project.do

............\.........\.........\dc_tag_ram.dat

............\.........\.........\dc_tag_ram.hex

............\.........\.........\ic_tag_ram.dat

............\.........\.........\ic_tag_ram.hex

............\.........\.........\JTAG_UART_input_mutex.dat

............\.........\.........\JTAG_UART_input_stream.dat

............\.........\.........\JTAG_UART_log.bat

............\.........\.........\JTAG_UART_output_stream.dat

............\.........\.........\list_presets.do

............\.........\.........\modelsim.tcl

............\.........\.........\rf_ram_a.dat

............\.........\.........\rf_ram_a.hex

............\.........\.........\rf_ram_b.dat

............\.........\.........\rf_ram_b.hex

............\.........\.........\setup_sim.do

............\.........\.........\SRAM.dat

............\.........\.........\SRAM.sym

............\.........\.........\SRAM_lane0.dat

............\.........\.........\SRAM_lane1.dat

............\.........\.........\SRAM_lane2.dat

............\.........\.........\SRAM_lane3.dat

............\.........\.........\virtuals.do

............\.........\.........\wave_presets.do

............\.........\version.ini

............\.sopc_builder\install.ptf

............\.............\install2.ptf

............\.............\preferences.xml

............\altera_vhdl_support.vhd

............\bht_ram.mif

............\CPU.ocp

............\CPU.sdc

............\CPU.vhd

............\CPU.vho

............\CPU_bht_ram.mif

............\CPU_dc_tag_ram.mif

............\CPU_ic_tag_ram.mif

............\CPU_jtag_debug_module.vhd

............\CPU_jtag_debug_module_sysclk.vhd

............\CPU_jtag_debug_module_tck.vhd

............\CPU_jtag_debug_module_wrapper.vhd

............\CPU_mult_cell.vhd

............\CPU_ociram_default_contents.mif

............\CPU_oci_test_bench.vhd

............\CPU_rf_ram_a.mif

............\CPU_rf_ram_b.mif

............\CPU_test_bench.vhd

............\db\PS2_KB.db_info

............\dc_tag_ram.mif

............\ic_tag_ram.mif

............\.ncremental_db\compiled_partitions\PS2_KB.root_partition.map.kpt

............\..............\README

............\JTAG_UART.vhd

............\myCPU.bsf

............\myCPU.ptf

............\myCPU.ptf.5.10

............\myCPU.ptf.8.0

............\myCPU.ptf.bak

............\myCPU.ptf.pre_generation_ptf

............\myCPU.qip

............\myCPU.sopc

............\myCPU.sopcinfo

............\myCPU.v

............\myCPU.

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