文件名称:CD1_MT9D001_DISPALY_SAVE
介绍说明－－下载内容均来自于网络，请自行研究使用
基于FPGA的CMOS图像传感器（MT9D00）显示并保存图像-FPGA-based CMOS image sensor (MT9D00) and save the image
(系统自动生成,下载前可以参看下载内容)
下载文件列表
CD1_MT9D001_DISPALY_SAVE
........................\FPGA_CODE
........................\.........\.sopc_builder
........................\.........\.............\install.ptf
........................\.........\.............\install2.ptf
........................\.........\.............\preferences.xml
........................\.........\Line_Buffer.qip
........................\.........\MT9D001_DISP_SAVE.asm.rpt
........................\.........\MT9D001_DISP_SAVE.cdf
........................\.........\MT9D001_DISP_SAVE.done
........................\.........\MT9D001_DISP_SAVE.dpf
........................\.........\MT9D001_DISP_SAVE.eda.rpt
........................\.........\MT9D001_DISP_SAVE.fit.rpt
........................\.........\MT9D001_DISP_SAVE.fit.smsg
........................\.........\MT9D001_DISP_SAVE.fit.summary
........................\.........\MT9D001_DISP_SAVE.flow.rpt
........................\.........\MT9D001_DISP_SAVE.jdi
........................\.........\MT9D001_DISP_SAVE.map.rpt
........................\.........\MT9D001_DISP_SAVE.map.smsg
........................\.........\MT9D001_DISP_SAVE.map.summary
........................\.........\MT9D001_DISP_SAVE.pin
........................\.........\MT9D001_DISP_SAVE.qpf
........................\.........\MT9D001_DISP_SAVE.qsf
........................\.........\MT9D001_DISP_SAVE.qsf.bak
........................\.........\MT9D001_DISP_SAVE.qws
........................\.........\MT9D001_DISP_SAVE.sof
........................\.........\MT9D001_DISP_SAVE.sta.rpt
........................\.........\MT9D001_DISP_SAVE.sta.summary
........................\.........\MT9D001_DISP_SAVE_assignment_defaults.qdf
........................\.........\NIOS.bsf
........................\.........\NIOS.ptf
........................\.........\NIOS.ptf.8.0
........................\.........\NIOS.ptf.bak
........................\.........\NIOS.ptf.pre_generation_ptf
........................\.........\NIOS.qip
........................\.........\NIOS.sopc
........................\.........\NIOS.sopcinfo
........................\.........\NIOS.v
........................\.........\NIOS_generation_script
........................\.........\NIOS_log.txt
........................\.........\NIOS_setup_quartus.tcl
........................\.........\NIOS_sim
........................\.........\........\atail-f.pl
........................\.........\........\jtag_uart_0_input_mutex.dat
........................\.........\........\jtag_uart_0_input_stream.dat
........................\.........\........\jtag_uart_0_output_stream.dat
........................\.........\PLL108.qip
........................\.........\PLLJ_PLLSPE_INFO.txt
........................\.........\Sdram_PLL.qip
........................\.........\USER_CODE
........................\.........\.........\CMOS_Capture.v
........................\.........\.........\Curve_Averaging.v
........................\.........\.........\Curve_Averaging.v.bak
........................\.........\.........\I2C_CMOS_Config.v
........................\.........\.........\I2C_Controller.v
........................\.........\.........\Line_Buffer.v
........................\.........\.........\MT9D001_DISP_SAVE.v
........................\.........\.........\MT9D001_DISP_SAVE.v.bak
........................\.........\.........\PLL108.ppf
........................\.........\.........\PLL108.qip
........................\.........\.........\PLL108.v
........................\.........\.........\PLL50.qip
........................\.........\.........\RAW2RGB.v
........................\.........\.........\RAW2RGB.v.bak
........................\.........\.........\Reset_Delay.v
........................\.........\.........\Sdram_Control_4Port
........................\.........\.........\...................\Sdram_Control_4Port.v
........................\.........\.........\...................\Sdram_Control_4Port.v.bak
........................\.........\.........\...................\Sdram_FIFO.v
........................\.........\.........\...................\Sdram_PLL.ppf