netmagicmini-example\assignment_defaults.qdf

....................\cdp\asyn_256_139.qip

....................\...\asyn_256_139.v

....................\...\asyn_256_139_bb.v

....................\...\asyn_64_1.qip

....................\...\asyn_64_1.v

....................\...\asyn_64_1_bb.v

....................\...\check_100_1000.v

....................\...\check_fifo.v

....................\...\crc_check.v

....................\...\crc_check_altcrc.v

....................\...\ddio_in_1.v

....................\...\ddio_in_4.v

....................\...\ddio_out.v

....................\...\ddio_out_1.v

....................\...\gmii_139_1000.v

....................\...\gmii_139_1000.v.bak

....................\...\.reybox_tmp\cbx_args.txt

....................\...\input2output_128_139.v

....................\...\input_ctrl.v

....................\...\input_ctrl.v.bak

....................\...\level2_256_139.qip

....................\...\level2_256_139.v

....................\...\level2_64_19.v

....................\...\output_ctrl.v

....................\...\output_ctrl.v.bak

....................\...\rgmii_gmii.v

....................\...\rule_32_30.qip

....................\...\rule_32_30.v

....................\...\rule_32_30.v.bak

....................\...\rule_32_30_bb.v

....................\...\rule_32_30_fifo.qip

....................\...\rule_32_30_fifo.v

....................\...\rx_64_1.qip

....................\...\rx_64_1.v

....................\...\rx_crc.v

....................\...\rx_crc.v.bak

....................\...\rx_tx_1000.v

....................\...\rx_tx_1000.v.bak

....................\...\tx139_gmii_1000.v

....................\...\tx139_gmii_1000.v.bak

....................\...\tx_gen.v

....................\...\tx_gen.v.bak

....................\ddr2\altera_avalon_half_rate_bridge.v

....................\....\altera_avalon_half_rate_bridge_constraints.sdc

....................\....\...memphy-library\auk_ddr_hp_controller.ocp

....................\....\alt_ddrx_addr_cmd.v

....................\....\alt_ddrx_afi_block.v

....................\....\alt_ddrx_avalon_if.v

....................\....\alt_ddrx_bank_timer.v

....................\....\alt_ddrx_bank_timer_info.v

....................\....\alt_ddrx_bank_timer_wrapper.v

....................\....\alt_ddrx_bypass.v

....................\....\alt_ddrx_cache.v

....................\....\alt_ddrx_clock_and_reset.v

....................\....\alt_ddrx_cmd_gen.v

....................\....\alt_ddrx_cmd_queue.v

....................\....\alt_ddrx_controller.v

....................\....\alt_ddrx_csr.v

....................\....\alt_ddrx_ddr2_odt_gen.v

....................\....\alt_ddrx_ddr3_odt_gen.v

....................\....\alt_ddrx_decoder.v

....................\....\alt_ddrx_decoder_40.v

....................\....\alt_ddrx_decoder_72.v

....................\....\alt_ddrx_ecc.v

....................\....\alt_ddrx_encoder.v

....................\....\alt_ddrx_encoder_40.v

....................\....\alt_ddrx_encoder_72.v

....................\....\alt_ddrx_input_if.v

....................\....\alt_ddrx_odt_gen.v

....................\....\alt_ddrx_rank_monitor.v

....................\....\alt_ddrx_state_machine.v

....................\....\alt_ddrx_timing_param.v

....................\....\alt_ddrx_wdata_fifo.v

....................\....\alt_mem_phy_defines.v

....................\....\ddr2.bsf

....................\....\ddr2.html

....................\....\ddr2.qip

....................\....\ddr2.v

....................\....\ddr2_advisor.ipa

....................\....\ddr2_alt_ddrx_controller_wrapper.v

....................\....\ddr2_bb.v

....................\....\ddr2_controller_phy.v

....................\....\ddr2_example_driver.v

....................\....\ddr2_example_top.sdc

....................\....\ddr2_example_top.v

....................\....\ddr2_ex_lfsr8.v

....................\....\.....high_performance_controller-library\auk_ddr_hp_controller.ocp

....................\....\ddr2_phy.bsf

....................\....\ddr2_phy.html

....................\....\ddr2_phy.qip

....................\....\ddr2_phy.v

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