文件名称:AES-based-on-FPGA-jiami
介绍说明－－下载内容均来自于网络，请自行研究使用
该模块是基于FPGA的AES加密算法实现的Verilog代码，包含一个顶层文件和两个调用模块，最高误差在15ns-This module is the AES encryption algorithm FPGA based on the Verilog code, contains a top-level files and two call module, the maximum error in 15ns
(系统自动生成,下载前可以参看下载内容)
下载文件列表
AES based on FPGA-jiami\aes_cipher_top.v
.......................\aes_cipher_top.v.bak
.......................\aes_cipher_top.vwf
.......................\aes_key_expand_128.v
.......................\aes_key_expand_128.v.bak
.......................\aes_key_expand_128.vwf
.......................\aes_sbox.v
.......................\aes_sbox.v.bak
.......................\db\logic_util_heursitic.dat
.......................\..\mux_src.tdf
.......................\..\wed.wsf
.......................\incremental_db\README
.......................\..............\compiled_partitions
.......................\db
.......................\incremental_db
AES based on FPGA-jiami