disign whit HSPICE:

Design and simulate a two stage CMOS operational amplifier shown in the Fig., for these

conditions:

 DC Voltage Gain > 60dB

 Unity Gain Bandwidth > 70MHz

 Phase Margin > 50 degrees

 Power Dissipation: as low as possible

 Technology: 2μm

 Power Supply: 3.3V

 Load Capacitance: 2pF

 Output Voltage Swing > 2Vp-p

 Make a unity feedback buffer and check the settling time of the circuit when you inject

a step voltage to the input with rise and fall time of 1μs.

Document your results in a written report including design procedure and all of

simulations. You also should highlight the most important features of the design.-disign whit HSPICE:

Design and simulate a two stage CMOS operational amplifier shown in the Fig., for these

conditions:

　DC Voltage Gain > 60dB

　Unity Gain Bandwidth > 70MHz

　Phase Margin > 50 degrees

　Power Dissipation: as low as possible

　Technology: 2μm

　Power Supply: 3.3V

　Load Capacitance: 2pF

　Output Voltage Swing > 2Vp-p

　Make a unity feedback buffer and check the settling time of the circuit when you inject

a step voltage to the input with rise and fall time of 1μs.

Document your results in a written report including design procedure and all of

simulations. You also should highlight the most important features of the design.