文件名称:CHANNEL_ESTIMATION_PROJECT

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-04-22
  • 文件大小:
  • 11.26mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • l**
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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基于 quartus 2 的 lte 信道估计verilog hdl代码 只有功能仿真 时序仿真自己加sdc文件并且调整testbench的clk才能做出来-Estimated Verilog HDL code based Quartus lte channel only functional simulation timing simulation plus sdc file and adjust the testbench clk to do it
(系统自动生成,下载前可以参看下载内容)

下载文件列表





CHANNEL_ESTIMATION_PROJECT\CDIV.v

..........................\CDIV.v.bak

..........................\CHANNEL_ESTIMATION.v

..........................\CHANNEL_ESTIMATION.v.bak

..........................\CHANNEL_ESTIMATION_VERILOG.asm.rpt

..........................\CHANNEL_ESTIMATION_VERILOG.done

..........................\CHANNEL_ESTIMATION_VERILOG.dpf

..........................\CHANNEL_ESTIMATION_VERILOG.eda.rpt

..........................\CHANNEL_ESTIMATION_VERILOG.fit.rpt

..........................\CHANNEL_ESTIMATION_VERILOG.fit.smsg

..........................\CHANNEL_ESTIMATION_VERILOG.fit.summary

..........................\CHANNEL_ESTIMATION_VERILOG.flow.rpt

..........................\CHANNEL_ESTIMATION_VERILOG.map.rpt

..........................\CHANNEL_ESTIMATION_VERILOG.map.smsg

..........................\CHANNEL_ESTIMATION_VERILOG.map.summary

..........................\CHANNEL_ESTIMATION_VERILOG.pin

..........................\CHANNEL_ESTIMATION_VERILOG.qpf

..........................\CHANNEL_ESTIMATION_VERILOG.qsf

..........................\CHANNEL_ESTIMATION_VERILOG.qws

..........................\CHANNEL_ESTIMATION_VERILOG.sof

..........................\CHANNEL_ESTIMATION_VERILOG.sta.rpt

..........................\CHANNEL_ESTIMATION_VERILOG.sta.summary

..........................\CHANNEL_ESTIMATION_VERILOG_nativelink_simulation.rpt

..........................\DATA_BUF.v

..........................\DATA_BUF.v.bak

..........................\DB_RAM.bsf

..........................\DB_RAM.qip

..........................\DB_RAM.v

..........................\DB_RAM_bb.v

..........................\DB_RAM_inst.v

..........................\db_ram_syn.v

..........................\DB_RAM_wave0.jpg

..........................\DB_RAM_wave1.jpg

..........................\DB_RAM_waveforms.html

..........................\FEQCOEFF.v

..........................\FEQCOEFF.v.bak

..........................\FOUTRAM.bsf

..........................\FOUTRAM.qip

..........................\FOUTRAM.v

..........................\FOUTRAM_bb.v

..........................\FOUTRAM_inst.v

..........................\foutram_syn.v

..........................\FOUTRAM_wave0.jpg

..........................\FOUTRAM_wave1.jpg

..........................\FOUTRAM_waveforms.html

..........................\FREQ_EDGE_SYMBOL_0_7.v

..........................\FREQ_EDGE_SYMBOL_0_7.v.bak

..........................\FREQ_EDGE_SYMBOL_4_11HEAD.v

..........................\FREQ_EDGE_SYMBOL_4_11HEAD.v.bak

..........................\FREQ_EDGE_SYMBOL_4_11TAIL.v

..........................\FREQ_EDGE_SYMBOL_4_11TAIL.v.bak

..........................\HOLDFIVECLK.v

..........................\HOLDFIVECLK.v.bak

..........................\HOLDSEVENCLK.v

..........................\HOLDTWOCLK.v

..........................\HOLDTWOCLK.v.bak

..........................\INTERP.v

..........................\INTERP.v.bak

..........................\INTERP2DATA.v

..........................\INTERP5DATA.v

..........................\INTERP5DATA.v.bak

..........................\ORDER_CHANGE.v

..........................\PILOTS_CDIV.v

..........................\PILOTS_CDIV.v.bak

..........................\RESHAPERAM.bsf

..........................\RESHAPERAM.qip

..........................\RESHAPERAM.v

..........................\RESHAPERAM_bb.v

..........................\RESHAPERAM_inst.v

..........................\reshaperam_syn.v

..........................\RESHAPERAM_wave0.jpg

..........................\RESHAPERAM_wave1.jpg

..........................\RESHAPERAM_waveforms.html

..........................\SSDIV.bsf

..........................\SSDIV.qip

..........................\SSDIV.v

..........................\SSDIV_bb.v

..........................\SSDIV_inst.v

..........................\ssdiv_syn.v

..........................\SSMULTI.bsf

..........................\SSMULTI.qip

..........................\SSMULTI.v

..........................\SSMULTI14_27.bsf

..........................\SSMULTI14_27.qip

..........................\SSMULTI14_27.v

..........................\SSMULTI14_27_bb.v

..........................\SSMULT

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