文件名称:fir_anthor405

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-04-10
  • 文件大小:
  • 13.64mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 李*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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基于DSP Builder在simulink开发环境下利用fir_compiler搭建fir滤波器,有很好的借鉴作用-Based on the DSP Builder and simulink development environment,by using fir_compiler build a fir filter, it can be a good reference
(系统自动生成,下载前可以参看下载内容)

下载文件列表





fir_anthor405

.............\DSPBuilder_fir_405_import

.............\.........................\fir_co.bsf

.............\.........................\fir_co.cmp

.............\.........................\fir_co.html

.............\.........................\fir_co.qip

.............\.........................\fir_co.vec

.............\.........................\fir_co.vhd

.............\.........................\fir_co.vho

.............\.........................\fir_co.vo.simdb

.............\.........................\fir_co.xml

.............\.........................\fir_compiler-library

.............\.........................\....................\accum.v

.............\.........................\....................\addr_cnt_dn.v

.............\.........................\....................\addr_cnt_dn_poly.v

.............\.........................\....................\addr_cnt_up.v

.............\.........................\....................\at_sink_mod.v

.............\.........................\....................\at_sink_mod_bin.v

.............\.........................\....................\at_sink_mod_par.v

.............\.........................\....................\at_src_mod.v

.............\.........................\....................\at_src_mod_par.v

.............\.........................\....................\auk_dspip_avalon_streaming_block_sink_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_block_source_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_controller_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_controller_pe_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_monitor_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_sink_fir_90.ocp

.............\.........................\....................\auk_dspip_avalon_streaming_sink_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_sink_model_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_source_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_source_from_monitor_fir_90.vhd

.............\.........................\....................\auk_dspip_avalon_streaming_source_model_fir_90.vhd

.............\.........................\....................\auk_dspip_delay_fir_90.vhd

.............\.........................\....................\auk_dspip_fastaddsub_fir_90.vhd

.............\.........................\....................\auk_dspip_fastadd_fir_90.vhd

.............\.........................\....................\auk_dspip_fast_accumulator_fir_90.vhd

.............\.........................\....................\auk_dspip_fifo_pfc_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_accumulator_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_adders_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_adder_tree_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_avalon_slave_write_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_coef_banks_fixed_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_data_memory_bank_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_dspblock_bank_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_dspblock_cascade_bank_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_lib_pkg_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_math_pkg_fir_90.vhd

.............\.........................\....................\auk_dspip_fir_memory_simple_dual_fir_90.vhd

.............\.........................\...................

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