文件名称:vc707-mig-rdf0160-14.3

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [PDF]
  • 上传时间:
  • 2013-09-26
  • 文件大小:
  • 12.2mb
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  • 0次
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  • 丁*
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介绍说明--下载内容均来自于网络,请自行研究使用

适用于DDR3 控制器代码等的FPGA代码-DDR3 controller code for FPGA code, etc.
(系统自动生成,下载前可以参看下载内容)

下载文件列表





example_top.ucf

mig_7series_v1_7\example_design\par\example_top.bit

................\..............\...\example_top.ucf

................\..............\...\ise_flow.bat

................\..............\rtl\example_top.v

................\..............\...\led_display_driver.v

................\..............\synth\example_top.prj

readme.txt

....y_for_download\example_top.bit

..................\make_download_files.bat

..................\vc707_mig.cpj

vc707_prebuilt_example_design\coregen.cgc

.............................\coregen.cgp

.............................\mig_7series_v1_7.gise

.............................\mig_7series_v1_7.veo

.............................\mig_7series_v1_7.xco

.............................\mig_7series_v1_7.xise

.............................\................\datasheet.txt

.............................\................\.ocs\phy_only_support_readme.txt

.............................\................\....\ug586_7Series_MIS.pdf

.............................\................\example_design\log.txt

.............................\................\..............\par\coregen.cgc

.............................\................\..............\...\create_ise.bat

.............................\................\..............\...\ddr_icon_cg.xco

.............................\................\..............\...\ddr_ila_basic_cg.xco

.............................\................\..............\...\ddr_ila_rdpath_cg.xco

.............................\................\..............\...\ddr_ila_wrpath_cg.xco

.............................\................\..............\...\ddr_vio_async_in_sync_out_cg.xco

.............................\................\..............\...\ddr_vio_sync_async_out72_cg.xco

.............................\................\..............\...\example_top.bit

.............................\................\..............\...\example_top.bld

.............................\................\..............\...\example_top.cdc

.............................\................\..............\...\example_top.ncd

.............................\................\..............\...\example_top.pad

.............................\................\..............\...\example_top.par

.............................\................\..............\...\example_top.ucf

.............................\................\..............\...\example_top_map.mrp

.............................\................\..............\...\ise_flow.bat

.............................\................\..............\...\makeproj.bat

.............................\................\..............\...\readme.txt

.............................\................\..............\...\rem_files.bat

.............................\................\..............\...\set_ise_prop.tcl

.............................\................\..............\...\xst_options.txt

.............................\................\..............\rtl\ddr2_ddr3_chipscope.v

.............................\................\..............\...\example_top.v

.............................\................\..............\...\led_display_driver.v

.............................\................\..............\...\mig_7series_v1_7_chk_win.v

.............................\................\..............\...\traffic_gen\mig_7series_v1_7_afifo.v

.............................\................\..............\...\...........\mig_7series_v1_7_cmd_gen.v

.............................\................\..............\...\...........\mig_7series_v1_7_cmd_prbs_gen.v

.............................\................\..............\...\...........\mig_7series_v1_7_data_prbs_gen.v

.............................\................\..............\...\...........\mig_7series_v1_7_init_mem_pattern_ctr.v

.............................\................\..............\...\...........\mig_7series_v1_7_memc_flow_vcontrol.v

.............................\................\..............\...\...........\mig_7series_v1_7_memc_traffic_gen.v

.............................\................\..............\...\...........\mig_7series_v1_7_rd_d

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