文件名称:zwcfq

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-09-20
  • 文件大小:
  • 174kb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 廖*
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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带置位和复位端的1 位数据锁存器,源代码verilo实现,在quartusII平台上,大家试试看。-With set and reset terminal a data latch, the source code verilo achieve, in the quartusII platform, we try.
(系统自动生成,下载前可以参看下载内容)

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带置位和复位端的1 位数据锁存器

..............................\db

..............................\..\latch_2.asm.qmsg

..............................\..\latch_2.asm_labs.ddb

..............................\..\latch_2.cbx.xml

..............................\..\latch_2.cmp.cdb

..............................\..\latch_2.cmp.hdb

..............................\..\latch_2.cmp.kpt

..............................\..\latch_2.cmp.logdb

..............................\..\latch_2.cmp.rdb

..............................\..\latch_2.cmp.tdb

..............................\..\latch_2.cmp0.ddb

..............................\..\latch_2.cmp2.ddb

..............................\..\latch_2.db_info

..............................\..\latch_2.dbp

..............................\..\latch_2.eco.cdb

..............................\..\latch_2.fit.qmsg

..............................\..\latch_2.hier_info

..............................\..\latch_2.hif

..............................\..\latch_2.map.cdb

..............................\..\latch_2.map.hdb

..............................\..\latch_2.map.logdb

..............................\..\latch_2.map.qmsg

..............................\..\latch_2.pre_map.cdb

..............................\..\latch_2.pre_map.hdb

..............................\..\latch_2.psp

..............................\..\latch_2.rtlv.hdb

..............................\..\latch_2.rtlv_sg.cdb

..............................\..\latch_2.rtlv_sg_swap.cdb

..............................\..\latch_2.sgdiff.cdb

..............................\..\latch_2.sgdiff.hdb

..............................\..\latch_2.signalprobe.cdb

..............................\..\latch_2.sld_design_entry.sci

..............................\..\latch_2.sld_design_entry_dsc.sci

..............................\..\latch_2.syn_hier_info

..............................\..\latch_2.tan.qmsg

..............................\latch_2.asm.rpt

..............................\latch_2.done

..............................\latch_2.fit.rpt

..............................\latch_2.fit.smsg

..............................\latch_2.fit.summary

..............................\latch_2.flow.rpt

..............................\latch_2.map.rpt

..............................\latch_2.map.summary

..............................\latch_2.pin

..............................\latch_2.pof

..............................\latch_2.qpf

..............................\latch_2.qsf

..............................\latch_2.qws

..............................\latch_2.sof

..............................\latch_2.tan.rpt

..............................\latch_2.tan.summary

..............................\latch_2.v

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