文件名称:MOTO3--zhiliu
介绍说明－－下载内容均来自于网络，请自行研究使用
运行于Altera Cyclone FPGA平台,顶层为原理图方式，模块由VHDL编写的直流电机驱动程序。-Running on Altera Cyclone FPGA platform, the top of the schematic way, the module VHDL prepared by the DC motor driver.
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下载文件列表
MOTO3 -zhiliu\AGEB.GDF
.............\ageb.mmf
.............\cmp3.bdf
.............\CMP3.GDF
.............\CMP3.SYM
.............\cmp_state.ini
.............\cnt.acf
.............\cnt.hif
.............\CNT.sym
.............\CNT.VHD
.............\CNT2.sym
.............\cnt2.vhd
.............\CNT24.MMF
.............\CNT24.SYM
.............\CNT24.VHD
.............\cnt5.acf
.............\cnt5.fit
.............\cnt5.hex
.............\cnt5.hif
.............\cnt5.mmf
.............\cnt5.ndb
.............\cnt5.pin
.............\cnt5.snf
.............\CNT5.sym
.............\cnt5.ttf
.............\cnt5.vhd
.............\cnt8.mmf
.............\CNT8.SYM
.............\CNT8.VHD
.............\CNTA.VHD
.............\cntB.gdf
.............\cntb.sym
.............\db\altsyncram_a172.tdf
.............\..\altsyncram_cj51.tdf
.............\..\altsyncram_uso3.tdf
.............\..\cmpr_0dd.tdf
.............\..\cntr_20j.tdf
.............\..\cntr_a4i.tdf
.............\..\cntr_cti.tdf
.............\..\cntr_r2i.tdf
.............\..\cntr_umi.tdf
.............\..\decode_9jf.tdf
.............\..\decode_ogi.tdf
.............\..\mux_6fc.tdf
.............\..\mux_ngc.tdf
.............\..\prev_cmp_step_a.asm.qmsg
.............\..\prev_cmp_step_a.eda.qmsg
.............\..\prev_cmp_step_a.fit.qmsg
.............\..\prev_cmp_step_a.map.qmsg
.............\..\prev_cmp_step_a.qmsg
.............\..\prev_cmp_step_a.sim.qmsg
.............\..\prev_cmp_step_a.tan.qmsg
.............\..\step_a.asm.qmsg
.............\..\step_a.cbx.xml
.............\..\step_a.cmp.cdb
.............\..\step_a.cmp.hdb
.............\..\step_a.cmp.kpt
.............\..\step_a.cmp.logdb
.............\..\step_a.cmp.rdb
.............\..\step_a.cmp.tdb
.............\..\step_a.cmp0.ddb
.............\..\step_a.db_info
.............\..\step_a.eco.cdb
.............\..\step_a.eda.qmsg
.............\..\step_a.eds_overflow
.............\..\step_a.fit.qmsg
.............\..\step_a.hier_info
.............\..\step_a.hif
.............\..\step_a.map.cdb
.............\..\step_a.map.hdb
.............\..\step_a.map.logdb
.............\..\step_a.map.qmsg
.............\..\step_a.map_bb.kpt
.............\..\step_a.pre_map.cdb
.............\..\step_a.pre_map.hdb
.............\..\step_a.rtlv.hdb
.............\..\step_a.rtlv_sg.cdb
.............\..\step_a.rtlv_sg_swap.cdb
.............\..\step_a.sgdiff.cdb
.............\..\step_a.sgdiff.hdb
.............\..\step_a.signalprobe.cdb
.............\..\step_a.sim.cvwf
.............\..\step_a.sim.hdb
.............\..\step_a.sim.qmsg
.............\..\step_a.sim.rdb
.............\..\step_a.sld_design_entry.sci
.............\..\step_a.sld_design_entry_dsc.sci
.............\..\step_a.syn_hier_info
.............\..\step_a.tan.qmsg
.............\..\step_a.tis_db_list.ddb
.............\..\wed.wsf
.............\db
.............\dec1.acf
.............\dec1.hif
.............\dec1.mmf
.............\DEC1.sym
.............\dec1.vhd
.............\dec2.acf
.............\dec2.hif
.............\dec2.mmf