文件名称:lab2parte1
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We want to show the values set through the switches SW8-1 on the 7-segment display and HEX0 Hex1. Values are denoted SW4 and SW8-5-one, shown in Hex1 and diplays HEX0, respectively. Your circuit must be able to show the digits 0 to 9, and deal values in 1010 to 1111 as "does not matter".
1. Create a new project that will be used to implement the desired circuit on board EXSTO. The intent of this exercise is to manually derive the logic functions necessary for the 7-segment displays. You should use simple expressions in your VHDL code and specify each logic function as a boolean expression.
2. Write a VHDL code that provides the required functionality. Include this code in your project and assign the pins on the FPGA to connect properly to the keys and displays, as shown in the Manual of FPGA board.
3. Compile the project and save the compiled circuit in FPGA chip.
4. Test the functionality of your design triggering the keys and watching the displays.-We want to show the values set through the switches SW8-1 on the 7-segment display and HEX0 Hex1. Values are denoted SW4 and SW8-5-one, shown in Hex1 and diplays HEX0, respectively. Your circuit must be able to show the digits 0 to 9, and deal values in 1010 to 1111 as "does not matter".
1. Create a new project that will be used to implement the desired circuit on board EXSTO. The intent of this exercise is to manually derive the logic functions necessary for the 7-segment displays. You should use simple expressions in your VHDL code and specify each logic function as a boolean expression.
2. Write a VHDL code that provides the required functionality. Include this code in your project and assign the pins on the FPGA to connect properly to the keys and displays, as shown in the Manual of FPGA board.
3. Compile the project and save the compiled circuit in FPGA chip.
4. Test the functionality of your design triggering the keys and watching the displays.
1. Create a new project that will be used to implement the desired circuit on board EXSTO. The intent of this exercise is to manually derive the logic functions necessary for the 7-segment displays. You should use simple expressions in your VHDL code and specify each logic function as a boolean expression.
2. Write a VHDL code that provides the required functionality. Include this code in your project and assign the pins on the FPGA to connect properly to the keys and displays, as shown in the Manual of FPGA board.
3. Compile the project and save the compiled circuit in FPGA chip.
4. Test the functionality of your design triggering the keys and watching the displays.-We want to show the values set through the switches SW8-1 on the 7-segment display and HEX0 Hex1. Values are denoted SW4 and SW8-5-one, shown in Hex1 and diplays HEX0, respectively. Your circuit must be able to show the digits 0 to 9, and deal values in 1010 to 1111 as "does not matter".
1. Create a new project that will be used to implement the desired circuit on board EXSTO. The intent of this exercise is to manually derive the logic functions necessary for the 7-segment displays. You should use simple expressions in your VHDL code and specify each logic function as a boolean expression.
2. Write a VHDL code that provides the required functionality. Include this code in your project and assign the pins on the FPGA to connect properly to the keys and displays, as shown in the Manual of FPGA board.
3. Compile the project and save the compiled circuit in FPGA chip.
4. Test the functionality of your design triggering the keys and watching the displays.
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lab2parte1.vhdl