文件名称:counter4

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [VHDL] [源码]
  • 上传时间:
  • 2013-08-24
  • 文件大小:
  • 2.1mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • xu***
  • 相关连接:
  • 下载说明:
  • 别用迅雷下载,失败请重下,重下不扣分!

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FPGA实现计数器,行为描述,包含仿真测试文件。-FPGA Implementation counter
(系统自动生成,下载前可以参看下载内容)

下载文件列表





counter4\counter.asm.rpt

........\counter.done

........\counter.fit.rpt

........\counter.fit.smsg

........\counter.fit.summary

........\counter.flow.rpt

........\counter.map.rpt

........\counter.map.smsg

........\counter.map.summary

........\counter.pin

........\counter.pof

........\counter.qpf

........\counter.qsf

........\counter.sof

........\counter.sta.rpt

........\counter.sta.summary

........\counter.v

........\counter_nativelink_simulation.rpt

........\counter_tb.v

........\counter_tb.v.bak

........\db\counter.amm.cdb

........\..\counter.asm.qmsg

........\..\counter.asm.rdb

........\..\counter.asm_labs.ddb

........\..\counter.cbx.xml

........\..\counter.cmp.bpm

........\..\counter.cmp.cdb

........\..\counter.cmp.hdb

........\..\counter.cmp.kpt

........\..\counter.cmp.logdb

........\..\counter.cmp.rdb

........\..\counter.cmp0.ddb

........\..\counter.cmp1.ddb

........\..\counter.cmp2.ddb

........\..\counter.cmp_merge.kpt

........\..\counter.db_info

........\..\counter.fit.qmsg

........\..\counter.hier_info

........\..\counter.hif

........\..\counter.idb.cdb

........\..\counter.lpc.html

........\..\counter.lpc.rdb

........\..\counter.lpc.txt

........\..\counter.map.bpm

........\..\counter.map.cdb

........\..\counter.map.hdb

........\..\counter.map.kpt

........\..\counter.map.logdb

........\..\counter.map.qmsg

........\..\counter.map_bb.cdb

........\..\counter.map_bb.hdb

........\..\counter.map_bb.logdb

........\..\counter.pre_map.cdb

........\..\counter.pre_map.hdb

........\..\counter.rpp.qmsg

........\..\counter.rtlv.hdb

........\..\counter.rtlv_sg.cdb

........\..\counter.rtlv_sg_swap.cdb

........\..\counter.sgate.rvd

........\..\counter.sgate_sm.rvd

........\..\counter.sgdiff.cdb

........\..\counter.sgdiff.hdb

........\..\counter.sld_design_entry.sci

........\..\counter.sld_design_entry_dsc.sci

........\..\counter.smart_action.txt

........\..\counter.sta.qmsg

........\..\counter.sta.rdb

........\..\counter.sta_cmp.8_slow.tdb

........\..\counter.syn_hier_info

........\..\counter.tis_db_list.ddb

........\..\logic_util_heursitic.dat

........\..\prev_cmp_counter.qmsg

........\incremental_db\compiled_partitions\counter.db_info

........\..............\...................\counter.root_partition.cmp.cdb

........\..............\...................\counter.root_partition.cmp.dfp

........\..............\...................\counter.root_partition.cmp.hdb

........\..............\...................\counter.root_partition.cmp.kpt

........\..............\...................\counter.root_partition.cmp.logdb

........\..............\...................\counter.root_partition.cmp.rcfdb

........\..............\...................\counter.root_partition.map.cdb

........\..............\...................\counter.root_partition.map.dpi

........\..............\...................\counter.root_partition.map.hbdb.cdb

........\..............\...................\counter.root_partition.map.hbdb.hb_info

........\..............\...................\counter.root_partition.map.hbdb.hdb

........\..............\...................\counter.root_partition.map.hbdb.sig

........\..............\...................\counter.root_partition.map.hdb

........\..............\...................\counter.root_partition.map.kpt

........\..............\README

........\simulation\modelsim\counter_run_msim_rtl_verilog.do

........\..........\........\counter_run_msim_rtl_verilog.do.bak

........\..........\........\counter_run_msim_rtl_verilog.do.bak1

........\..........\........\fmonitor.vec

........\..........\........\msim_transcript

........\..........\........\rtl_work\@_opt\vopt1dmsig

........\..........\........\........\.....\vopt2evw1f

........\..........\........\........\.....\vopt5xanig

........\..........\........\........\.....\vopt5ygr1f

........\..........\........\........\.....\vopt8d0iig

........\..........\........\........\.....\vopt9e6m1f

........\..........\........\........\.....\voptcdtf2f

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