文件名称:DATA_interleaver

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  • VHDL编程
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  • [PDF]
  • 上传时间:
  • 2013-03-28
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  • 2.84mb
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使用ISE开发环境实现802.11a物理层OFDM系统中交织模块-ISE development environment to achieve 802.11a physical layer OFDM system, interwoven module
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DATA_interleaver\DATA_interleaver\DATA_interleaver.cmd_log

................\................\DATA_interleaver.gise

................\................\DATA_interleaver.lso

................\................\DATA_interleaver.ngc

................\................\DATA_interleaver.ngr

................\................\DATA_interleaver.prj

................\................\DATA_interleaver.stx

................\................\DATA_interleaver.syr

................\................\DATA_interleaver.v

................\................\DATA_interleaver.xise

................\................\DATA_interleaver.xst

................\................\DATA_interleaver_envsettings.html

................\................\DATA_interleaver_summary.html

................\................\DATA_interleaver_tb.v

................\................\data_interleaver_tb_beh.prj

................\................\data_interleaver_tb_isim_beh.exe

................\................\data_interleaver_tb_isim_beh.wdb

................\................\data_interleaver_tb_stx_beh.prj

................\................\DATA_interleaver_xst.xrpt

................\................\fuse.log

................\................\fuse.xmsgs

................\................\fuseRelaunch.cmd

................\................\ipcore_dir\blk_mem_gen_ds512.pdf

................\................\..........\blk_mem_gen_v6_2_readme.txt

................\................\..........\coregen.cgp

................\................\..........\coregen.log

................\................\..........\core_resources.txt

................\................\..........\..unt24\doc\c_counter_binary_v11_0_vinfo.html

................\................\..........\.......\...\ds215_counter.pdf

................\................\..........\count24.asy

................\................\..........\count24.gise

................\................\..........\count24.ncf

................\................\..........\count24.ngc

................\................\..........\count24.sym

................\................\..........\count24.v

................\................\..........\count24.veo

................\................\..........\count24.xco

................\................\..........\count24.xise

................\................\..........\count24_flist.txt

................\................\..........\count24_readme.txt

................\................\..........\count24_xmdf.tcl

................\................\..........\create_count24.tcl

................\................\..........\create_dint_ram.tcl

................\................\..........\create_dint_ram2.tcl

................\................\..........\create_rcount_1.tcl

................\................\..........\dint_ram.asy

................\................\..........\dint_ram.gise

................\................\..........\dint_ram.ncf

................\................\..........\dint_ram.ngc

................\................\..........\dint_ram.sym

................\................\..........\dint_ram.v

................\................\..........\dint_ram.veo

................\................\..........\dint_ram.xco

................\................\..........\dint_ram.xise

................\................\..........\dint_ram2.asy

................\................\..........\dint_ram2.gise

................\................\..........\dint_ram2.ncf

................\................\..........\dint_ram2.ngc

................\................\..........\dint_ram2.sym

................\................\..........\dint_ram2.v

................\................\..........\dint_ram2.veo

................\................\..........\dint_ram2.xco

................\................\..........\dint_ram2.xise

................\................\..........\dint_ram2_flist.txt

................\................\..........\..........ste\example_design\dint_ram2_top.ucf

................\................\..........\.............\..............\dint_ram2_top.vhd

................\................\..........\.............\..............\dint_ram2_to

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