文件名称:clock_lcd
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基于FPGA用verilog实现电子时钟功能,适合初学verilog者-Suitable for beginners verilog verilog achieve FPGA-based electronic clock function
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下载文件列表
clock_lcd\clock_lcd.asm.rpt
.........\clock_lcd.cdf
.........\clock_lcd.done
.........\clock_lcd.eda.rpt
.........\clock_lcd.fit.rpt
.........\clock_lcd.fit.smsg
.........\clock_lcd.fit.summary
.........\clock_lcd.flow.rpt
.........\clock_lcd.jdi
.........\clock_lcd.map.rpt
.........\clock_lcd.map.smsg
.........\clock_lcd.map.summary
.........\clock_lcd.pin
.........\clock_lcd.qpf
.........\clock_lcd.qsf
.........\clock_lcd.qws
.........\clock_lcd.sof
.........\clock_lcd.sta.rpt
.........\clock_lcd.sta.summary
.........\clock_lcd.tis_db_list.ddb
.........\clock_lcd.v
.........\clock_lcd.v.bak
.........\clock_lcd_assignment_defaults.qdf
.........\Counter.v
.........\db\altsyncram_1bp3.tdf
.........\..\altsyncram_1s01.tdf
.........\..\altsyncram_5024.tdf
.........\..\altsyncram_knu.tdf
.........\..\alt_synch_pipe_36d.tdf
.........\..\alt_synch_pipe_46d.tdf
.........\..\alt_synch_pipe_8u7.tdf
.........\..\alt_synch_pipe_9u7.tdf
.........\..\a_graycounter_d4c.tdf
.........\..\a_graycounter_e4c.tdf
.........\..\a_graycounter_im6.tdf
.........\..\clock_lcd.ace_cmp.bpm
.........\..\clock_lcd.ace_cmp.cdb
.........\..\clock_lcd.ace_cmp.hdb
.........\..\clock_lcd.acvq.rdb
.........\..\clock_lcd.amm.cdb
.........\..\clock_lcd.asm.qmsg
.........\..\clock_lcd.asm.rdb
.........\..\clock_lcd.asm_labs.ddb
.........\..\clock_lcd.autoh_e4eb1.map.reg_db.cdb
.........\..\clock_lcd.autos_3e921.map.reg_db.cdb
.........\..\clock_lcd.cbx.xml
.........\..\clock_lcd.cmp.bpm
.........\..\clock_lcd.cmp.cdb
.........\..\clock_lcd.cmp.hdb
.........\..\clock_lcd.cmp.kpt
.........\..\clock_lcd.cmp.logdb
.........\..\clock_lcd.cmp.rdb
.........\..\clock_lcd.cmp_merge.kpt
.........\..\clock_lcd.cuda_io_sim_cache.31um_ff_1200mv_0c_fast.hsd
.........\..\clock_lcd.cuda_io_sim_cache.31um_ss_1200mv_85c_slow.hsd
.........\..\clock_lcd.db_info
.........\..\clock_lcd.eco.cdb
.........\..\clock_lcd.eda.qmsg
.........\..\clock_lcd.fit.qmsg
.........\..\clock_lcd.hier_info
.........\..\clock_lcd.hif
.........\..\clock_lcd.idb.cdb
.........\..\clock_lcd.lpc.html
.........\..\clock_lcd.lpc.rdb
.........\..\clock_lcd.lpc.txt
.........\..\clock_lcd.map.bpm
.........\..\clock_lcd.map.cdb
.........\..\clock_lcd.map.hdb
.........\..\clock_lcd.map.kpt
.........\..\clock_lcd.map.logdb
.........\..\clock_lcd.map.qmsg
.........\..\clock_lcd.map.rdb
.........\..\clock_lcd.map_bb.cdb
.........\..\clock_lcd.map_bb.hdb
.........\..\clock_lcd.map_bb.logdb
.........\..\clock_lcd.pre_map.cdb
.........\..\clock_lcd.pre_map.hdb
.........\..\clock_lcd.root_partition.map.reg_db.cdb
.........\..\clock_lcd.routing.rdb
.........\..\clock_lcd.rtlv.hdb
.........\..\clock_lcd.rtlv_sg.cdb
.........\..\clock_lcd.rtlv_sg_swap.cdb
.........\..\clock_lcd.sgdiff.cdb
.........\..\clock_lcd.sgdiff.hdb
.........\..\clock_lcd.sld_design_entry.sci
.........\..\clock_lcd.sld_design_entry_dsc.sci
.........\..\clock_lcd.smart_action.txt
.........\..\clock_lcd.smp_dump.txt
.........\..\clock_lcd.sta.qmsg
.........\..\clock_lcd.sta.rdb
.........\..\clock_lcd.sta_cmp.8_slow_1200mv_85c.tdb
.........\..\clock_lcd.syn_hier_info
.........\..\clock_lcd.tiscmp.fast_1200mv_0c.ddb
.........\..\clock_lcd.tiscmp.slow_1200mv_0c.ddb
.........\..\clock_lcd.tiscmp.slow_1200mv_85c.ddb
.........\..\clock_lcd.tis_db_list.ddb
.........\..\cmpr_656.tdf
.........\..\cmpr_efc.tdf
.........\..\cmpr_ifc.tdf
.........\..\cntr_9fi.tdf