fpga_ctl\.sopc_builder\filters.xml

........\.............\install.ptf

........\.............\install2.ptf

........\.............\preferences.xml

........\AD_BUSY.vhd

........\AD_CHANNAL.vhd

........\AD_CLK.vhd

........\AD_CS.vhd

........\AD_DATA.vhd

........\AD_RC.vhd

........\AD_SYNC.vhd

........\altpll0.bsf

........\altpll0.cmp

........\altpll0.ppf

........\altpll0.qip

........\altpll0.vhd

........\Chain1.cdf

........\cpu_0.sdc

........\cpu_0.vhd

........\cpu_0_jtag_debug_module_sysclk.vhd

........\cpu_0_jtag_debug_module_tck.vhd

........\cpu_0_jtag_debug_module_wrapper.vhd

........\cpu_0_ociram_default_contents.mif

........\cpu_0_oci_test_bench.vhd

........\cpu_0_rf_ram.mif

........\cpu_0_test_bench.vhd

........\db\altsyncram_0c21.tdf

........\..\altsyncram_fd22.tdf

........\..\altsyncram_qt62.tdf

........\..\altsyncram_stv1.tdf

........\..\altsyncram_trb1.tdf

........\..\fpga_ctl.ace_cmp.bpm

........\..\fpga_ctl.ace_cmp.cdb

........\..\fpga_ctl.ace_cmp.ecobp

........\..\fpga_ctl.ace_cmp.hdb

........\..\fpga_ctl.asm.qmsg

........\..\fpga_ctl.asm.rdb

........\..\fpga_ctl.cbx.xml

........\..\fpga_ctl.cmp.bpm

........\..\fpga_ctl.cmp.cdb

........\..\fpga_ctl.cmp.ecobp

........\..\fpga_ctl.cmp.hdb

........\..\fpga_ctl.cmp.kpt

........\..\fpga_ctl.cmp.logdb

........\..\fpga_ctl.cmp.rdb

........\..\fpga_ctl.cmp.tdb

........\..\fpga_ctl.cmp0.ddb

........\..\fpga_ctl.cmp_merge.kpt

........\..\fpga_ctl.db_info

........\..\fpga_ctl.eco.cdb

........\..\fpga_ctl.fit.qmsg

........\..\fpga_ctl.hier_info

........\..\fpga_ctl.hif

........\..\fpga_ctl.lpc.html

........\..\fpga_ctl.lpc.rdb

........\..\fpga_ctl.lpc.txt

........\..\fpga_ctl.map.bpm

........\..\fpga_ctl.map.cdb

........\..\fpga_ctl.map.ecobp

........\..\fpga_ctl.map.hdb

........\..\fpga_ctl.map.kpt

........\..\fpga_ctl.map.logdb

........\..\fpga_ctl.map.qmsg

........\..\fpga_ctl.map_bb.cdb

........\..\fpga_ctl.map_bb.hdb

........\..\fpga_ctl.map_bb.logdb

........\..\fpga_ctl.pre_map.cdb

........\..\fpga_ctl.pre_map.hdb

........\..\fpga_ctl.rtlv.hdb

........\..\fpga_ctl.rtlv_sg.cdb

........\..\fpga_ctl.rtlv_sg_swap.cdb

........\..\fpga_ctl.sgdiff.cdb

........\..\fpga_ctl.sgdiff.hdb

........\..\fpga_ctl.sld_design_entry.sci

........\..\fpga_ctl.sld_design_entry_dsc.sci

........\..\fpga_ctl.smart_action.txt

........\..\fpga_ctl.syn_hier_info

........\..\fpga_ctl.tan.qmsg

........\..\fpga_ctl.tis_db_list.ddb

........\..\fpga_ctl.tmw_info

........\..\logic_util_heursitic.dat

........\..\prev_cmp_fpga_ctl.asm.qmsg

........\..\prev_cmp_fpga_ctl.fit.qmsg

........\..\prev_cmp_fpga_ctl.map.qmsg

........\..\prev_cmp_fpga_ctl.qmsg

........\..\prev_cmp_fpga_ctl.tan.qmsg

........\..\sopcb_tb2_mcu.xml

........\DG_Ctrl.vhd

........\DIR.vhd

........\epcs.vhd

........\epcs_boot_rom.hex

........\flash\fpga_app_epcs.flash

........\.....\fpga_ctl_epcs.flash

........\fpga_ctl.asm.rpt

........\fpga_ctl.bdf

........\fpga_ctl.cdf

........\fpga_ctl.done

........\fpga_ctl.dpf

........\fpga_ctl.fit.rpt

........\fpga_ctl.fit.smsg