文件名称:spi
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VHDL实现SPI功能源代码
-- The SPI bus is a 3 wire bus that in effect links a serial shift
-- register between the \"master\" and the \"slave\". Typically both the
-- master and slave have an 8 bit shift register so the combined
-- register is 16 bits. When an SPI transfer takes place, the master and
-- slave shift their shift registers 8 bits and thus exchange their 8
-- bit register values.
-- The SPI bus is a 3 wire bus that in effect links a serial shift
-- register between the \"master\" and the \"slave\". Typically both the
-- master and slave have an 8 bit shift register so the combined
-- register is 16 bits. When an SPI transfer takes place, the master and
-- slave shift their shift registers 8 bits and thus exchange their 8
-- bit register values.
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下载文件列表
压缩包 : 19854826spi.rar 列表 spi\LIB.DLS spi\spi(1).cnf spi\spi(2).cnf spi\spi(3).cnf spi\spi(4).cnf spi\spi(5).cnf spi\spi(6).cnf spi\spi(7).cnf spi\spi(8).cnf spi\spi(9).cnf spi\spi.acf spi\spi.cnf spi\spi.hif spi\spi.mmf spi\spi.ndb spi\SPI.sym spi\spi.vhd spi\U0200221.DLS spi\U1754406.DLS spi\U2561360.DLS spi\U2918138.DLS spi\U3670051.DLS spi\U4824688.DLS spi\U8712012.DLS spi