文件名称:9.2_LCD_PULSE
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基于Verilog-HDL的硬件电路的实现
9.2 具有LCD显示单元的可编程单脉冲发生器
9.2.1 LCD显示单元的工作原理
9.2.2 显示逻辑设计的思路与流程
9.2.3 LCD显示单元的硬件实现
9.2.4 可编程单脉冲数据的BCD码化
9.2.5 task的使用方法
9.2.6 for循环语句的使用方法
9.2.7 二进制数转换BCD码的硬件实现
9.2.8 可编程单脉冲发生器与显示单元的接口
9.2.9 具有LCD显示单元的可编程单脉冲发生器的硬件实现
9.2.10 编译指令-\"文件包含\"处理的使用方法
-based on Verilog-HDL hardware Circuit of 9.2 LCD display module with the series Single-Pulse Generator 9.2.1 LCD display module Principle 9.2.2 shows the logic design Thinking and Process 9.2.3 LCD display module hardware 9.2.4 programmable single pulse data BCD of the task 9.2.5 9.2.6 for the use of the phrase cycle use 9.2.7 binary conversion of BCD programmable hardware 9.2.8 single pulse generator with a said unit 9.2.9 interface with the LCD display module programmable pulse generator hardware 9 .2.10 compiler directives - "document includes" the use of
9.2 具有LCD显示单元的可编程单脉冲发生器
9.2.1 LCD显示单元的工作原理
9.2.2 显示逻辑设计的思路与流程
9.2.3 LCD显示单元的硬件实现
9.2.4 可编程单脉冲数据的BCD码化
9.2.5 task的使用方法
9.2.6 for循环语句的使用方法
9.2.7 二进制数转换BCD码的硬件实现
9.2.8 可编程单脉冲发生器与显示单元的接口
9.2.9 具有LCD显示单元的可编程单脉冲发生器的硬件实现
9.2.10 编译指令-\"文件包含\"处理的使用方法
-based on Verilog-HDL hardware Circuit of 9.2 LCD display module with the series Single-Pulse Generator 9.2.1 LCD display module Principle 9.2.2 shows the logic design Thinking and Process 9.2.3 LCD display module hardware 9.2.4 programmable single pulse data BCD of the task 9.2.5 9.2.6 for the use of the phrase cycle use 9.2.7 binary conversion of BCD programmable hardware 9.2.8 single pulse generator with a said unit 9.2.9 interface with the LCD display module programmable pulse generator hardware 9 .2.10 compiler directives - "document includes" the use of
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下载文件列表
压缩包 : 218402579.2_lcd_pulse.rar 列表 09-02_fangzhen\BIN_BCD_3_TEST.v 09-02_fangzhen\BIN_BCD_4_TEST.v 09-02_fangzhen\BIN_BCD_4.v 09-02_fangzhen\BIN_BCD_3.v 09-02_fangzhen\BIN_BCD_1.v 09-02_fangzhen\BIN_BCD_1_TEST.v 09-02_fangzhen\BIN_BCD_2.v 09-02_fangzhen\BIN_BCD_2_TEST.v 09-02_fangzhen\LCD_S.v 09-02_fangzhen\LCD_S_TEST.v 09-02_fangzhen