文件名称:MC8051_IPcore
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51IP核_VHDL和Verilog编写，并通过编写的C语言源程序进行测试通过-The 51IP the nuclear _VHDL and Verilog, and written in C language source code for testing by
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下载文件列表
MC8051_IPcore
.............\8051core-Verilog
.............\................\Acc.v
.............\................\All.v
.............\................\Alu.v
.............\................\alu_src1_sel.v
.............\................\alu_src2_sel.v
.............\................\alu_src3_sel.v
.............\................\Comp.v
.............\................\cy_select.v
.............\................\Decoder.v
.............\................\Defines.v
.............\................\Divide.v
.............\................\Dptr.v
.............\................\ext_addr_sel.v
.............\................\immediate_sel.v
.............\................\IndiAddr.v
.............\................\Make
.............\................\Multiply.v
.............\................\op_select.v
.............\................\Pc.v
.............\................\Port_out.v
.............\................\Psw.v
.............\................\Ram.v
.............\................\ram_rd_sel.v
.............\................\Ram_sel.v
.............\................\ram_wr_sel.v
.............\................\Reg1.v
.............\................\Reg2.v
.............\................\Reg3.v
.............\................\Reg4.v
.............\................\Reg5.v
.............\................\Reg8.v
.............\................\Reg8r.v
.............\................\Rom.v
.............\................\rom_addr_sel.v
.............\................\Sp.v
.............\................\Tb_all.v
.............\................\transcript
.............\MC8051 IPcore实验教程.pdf
.............\mc8051_Source
.............\.............\c
.............\.............\.\hex2dual.c
.............\.............\.\hex2dual.dev
.............\.............\.\hex2dual.exe
.............\.............\.\hex2dual.o
.............\.............\.\Makefile.win
.............\.............\.\mc8051_rom.dua
.............\.............\.\TC1INT.hex
.............\.............\.\TC1SER.hex
.............\.............\.\tc1tim.hex
.............\.............\.\TC2INT.hex
.............\.............\.\TC2TIM.hex
.............\.............\.\tc3int.hex
.............\.............\.\tc3tim.hex
.............\.............\.\TC4INT.hex
.............\.............\doc
.............\.............\...\8051_overview.pdf
.............\.............\...\comp_orig_ipcore.pdf
.............\.............\...\mc8051_overview.pdf
.............\.............\...\mc8051_user_guide.pdf
.............\.............\impl
.............\.............\....\cyclone
.............\.............\....\.......\db
.............\.............\....\stratixii
.............\.............\....\.........\db
.............\.............\....\virtex2p
.............\.............\....\virtex4
.............\.............\msim
.............\.............\....\hex2dual.c
.............\.............\....\keil.dua
.............\.............\....\keil.hex
.............\.............\....\mc8051_compile.do
.............\.............\....\mc8051_rom.dua
.............\.............\....\mc8051_sim.do
.............\.............\....\mc8051_simint.do
.............\.............\....\mc8051_simtim.do
.............\.............\....\mc8051_tb.do
.............\.............\....\mc8051_wave.do
.............\.............\....\mc8051_waveint.do
.............\.............\....\mc8051_wavetim.do
.............\.............\....\readme.txt
.............\.............\....\regs.log
.............\.............\....\stored_waves
.............\.............\....\tc1.asm
.............\.............\....\tc1.dua
.............\.............\....\tc1.hex
.............\.............\....\write2file.do
.............\.............\syn
.............\.............\...\dc
.............\.............\...\..\.synopsys_dc.setup
.............\.............\...\..\command.log
.............\.............\...\..\db
.............\.............\...\..\lib
.............\.............\...\..\log
.............\.............\...\..\reports
.............\.............\...\..\scr
.............\.............\...\..\...\synth_core_dc.scr
...........