文件名称:design_1
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编码锁存器由主持人(start)控制以及 6 名选手输入(xuanshou(6:0))。主持 人信号无效(‘1’)时,将中间变量 Q_Z‘0’赋‘1’,主持人信号有效(‘0’)之后,如果中间 变量 Q_Z‘0’ 为‘1’,这时候 存下选手号的七段码显示,并将中间变量 Q_Z‘0’ 赋值为‘0’,使 下一个选手抢答信号输入无效,达到锁存的效果。最后给抢中输出(q)赋‘0’,表示已经 有选手抢中。-Encoding latch is controlled by the host (start) and 6 the the players input (xuanshou (6:0)). Moderator signal is invalid (' 1 ' ), the intermediate variables Q_Z' 0' Fu ' 1 ' , the host signal (' 0' ), if the intermediate variables Q_Z' 0 ' to ' 1' , this time able to save contestant number seven segment display, and the intermediate variables Q_Z' 0 ' assigned to ' 0' , so that the next player to answer in invalid signal input to achieve the effect of the latch. Finally, to grab in the output (q) endowed ' 0 ' , players grab in.
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1基于FPGA的编码锁存电路设计和仿真.docx