文件名称:comp_16
介绍说明--下载内容均来自于网络,请自行研究使用
设计16位同步计数器
要求:(1)分析16位同步计数器结构和电路特点;
(2)用硬件描述语言进行设计;
(3)编写测试仿真并进行仿真。-Design 16-bit synchronous counter requirements: (1) analysis of the 16-bit synchronous counter and circuit characteristics (2) hardware descr iption language design (3) preparation of test simulation and simulation.
要求:(1)分析16位同步计数器结构和电路特点;
(2)用硬件描述语言进行设计;
(3)编写测试仿真并进行仿真。-Design 16-bit synchronous counter requirements: (1) analysis of the 16-bit synchronous counter and circuit characteristics (2) hardware descr iption language design (3) preparation of test simulation and simulation.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
transcript
work\_info
....\_vmake
....\comp_16_tb\_primary.vhd
....\.......\_primary.vhd
....\......._tb\verilog.asm
....\.......\verilog.asm
comp_16.v.bak
comp_16_tb.v.bak
work\comp_16\_primary.dbs
....\......._tb\_primary.dbs
comp_16.mpf
comp_16.cr.mti
work\comp_16_tb\verilog.rw
....\.......\verilog.rw
comp_16.v
comp_16_tb.v
vsim.wlf
work\comp_16\_primary.dat
....\......._tb\_primary.dat
....\_temp
....\comp_16_tb
....\comp_16
work