文件名称:anjianshumaguan
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应用VHDL语言实现对FPGA的程序编写，实现按键数码管的功能。-Using VHDL language to write FPGA procedures to achieve the key function of the digital tube.
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下载文件列表
a22\a22.asm.rpt
...\a22.cdf
...\a22.done
...\a22.fit.rpt
...\a22.fit.summary
...\a22.flow.rpt
...\a22.map.rpt
...\a22.map.summary
...\a22.pin
...\a22.pof
...\a22.qpf
...\a22.qsf
...\a22.qws
...\a22.tan.rpt
...\a22.tan.summary
...\a22.vhd
...\a22.vhd.bak
...\db\a22.asm.qmsg
...\..\a22.cbx.xml
...\..\a22.cmp.cdb
...\..\a22.cmp.hdb
...\..\a22.cmp.logdb
...\..\a22.cmp.rdb
...\..\a22.cmp.tdb
...\..\a22.cmp0.ddb
...\..\a22.db_info
...\..\a22.eco.cdb
...\..\a22.fit.qmsg
...\..\a22.hier_info
...\..\a22.hif
...\..\a22.map.cdb
...\..\a22.map.hdb
...\..\a22.map.logdb
...\..\a22.map.qmsg
...\..\a22.pre_map.cdb
...\..\a22.pre_map.hdb
...\..\a22.rtlv.hdb
...\..\a22.rtlv_sg.cdb
...\..\a22.rtlv_sg_swap.cdb
...\..\a22.sgdiff.cdb
...\..\a22.sgdiff.hdb
...\..\a22.sld_design_entry.sci
...\..\a22.sld_design_entry_dsc.sci
...\..\a22.syn_hier_info
...\..\a22.tan.qmsg
...\..\a22.tis_db_list.ddb
...\..\a22.tmw_info
...\..\prev_cmp_a22.asm.qmsg
...\..\prev_cmp_a22.fit.qmsg
...\..\prev_cmp_a22.map.qmsg
...\..\prev_cmp_a22.qmsg
...\..\prev_cmp_a22.tan.qmsg
...\db
a22