文件名称:vgaxianshi
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基于Verilog语言是VGA显示电路设计文件、顶层设计文件-Based on Verilog language VGA display circuit design file, the top-level design file
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下载文件列表
vgaxianshi
..........\PLL50.bsf
..........\PLL50.inc
..........\PLL50.ppf
..........\PLL50.qip
..........\PLL50.tdf
..........\db
..........\..\PLL50_altpll.v
..........\..\altsyncram_nfd1.tdf
..........\..\logic_util_heursitic.dat
..........\..\prev_cmp_vgaV.asm.qmsg
..........\..\prev_cmp_vgaV.fit.qmsg
..........\..\prev_cmp_vgaV.map.qmsg
..........\..\prev_cmp_vgaV.qmsg
..........\..\prev_cmp_vgaV.sta.qmsg
..........\..\vgaV.asm.qmsg
..........\..\vgaV.asm.rdb
..........\..\vgaV.cbx.xml
..........\..\vgaV.cmp.cbp
..........\..\vgaV.cmp.ecobp
..........\..\vgaV.cmp.kpt
..........\..\vgaV.cmp.rdb
..........\..\vgaV.cmp_merge.kpt
..........\..\vgaV.cuda_io_sim_cache.45um_ff_1200mv_0c_fast.hsd
..........\..\vgaV.cuda_io_sim_cache.45um_ss_1200mv_85c_slow.hsd
..........\..\vgaV.db_info
..........\..\vgaV.eco.cdb
..........\..\vgaV.fit.qmsg
..........\..\vgaV.hier_info
..........\..\vgaV.hif
..........\..\vgaV.lpc.html
..........\..\vgaV.lpc.rdb
..........\..\vgaV.lpc.txt
..........\..\vgaV.map.ecobp
..........\..\vgaV.map.kpt
..........\..\vgaV.map.qmsg
..........\..\vgaV.map_bb.hdb
..........\..\vgaV.pre_map.cdb
..........\..\vgaV.pre_map.hdb
..........\..\vgaV.rtlv.hdb
..........\..\vgaV.rtlv_sg.cdb
..........\..\vgaV.rtlv_sg_swap.cdb
..........\..\vgaV.sgdiff.cdb
..........\..\vgaV.sgdiff.hdb
..........\..\vgaV.sld_design_entry.sci
..........\..\vgaV.sld_design_entry_dsc.sci
..........\..\vgaV.smart_action.txt
..........\..\vgaV.sta.qmsg
..........\..\vgaV.sta.rdb
..........\..\vgaV.syn_hier_info
..........\..\vgaV.tis_db_list.ddb
..........\imgROM1.bsf
..........\imgROM1.inc
..........\imgROM1.qip
..........\imgROM1.tdf
..........\imgROM1_wave0.jpg
..........\imgROM1_waveforms.html
..........\incremental_db
..........\..............\README
..........\..............\compiled_partitions
..........\..............\...................\vgaV.root_partition.cmp.cdb
..........\..............\...................\vgaV.root_partition.cmp.dfp
..........\..............\...................\vgaV.root_partition.cmp.hdb
..........\..............\...................\vgaV.root_partition.cmp.kpt
..........\..............\...................\vgaV.root_partition.cmp.logdb
..........\..............\...................\vgaV.root_partition.cmp.rcfdb
..........\..............\...................\vgaV.root_partition.cmp.re.rcfdb
..........\..............\...................\vgaV.root_partition.map.cdb
..........\..............\...................\vgaV.root_partition.map.dpi
..........\..............\...................\vgaV.root_partition.map.hdb
..........\..............\...................\vgaV.root_partition.map.kpt
..........\vgaV.asm.rpt
..........\vgaV.bsf
..........\vgaV.done
..........\vgaV.dpf
..........\vgaV.fit.rpt
..........\vgaV.fit.smsg
..........\vgaV.fit.summary
..........\vgaV.flow.rpt
..........\vgaV.map.rpt
..........\vgaV.map.summary
..........\vgaV.qpf
..........\vgaV.qsf
..........\vgaV.qws
..........\vgaV.sof
..........\vgaV.sta.rpt
..........\vgaV.sta.summary
..........\vgaV.v
..........\vgaV.v.bak
..........\vgaXS.bdf