文件名称:Second_VHDL
介绍说明－－下载内容均来自于网络，请自行研究使用
本程序是用VHDL实现的秒表，通过对主时钟进行分频得到低速时钟，以调试通过，大家可以参考。-This program is implemented with VHDL stopwatch, low-speed clock master clock divider to debug through, we can refer to.
(系统自动生成,下载前可以参看下载内容)
下载文件列表
Second_VHDL\db\miaobiao.db_info
...........\..\miaobiao.eco.cdb
...........\..\miaobiao.sld_design_entry.sci
...........\db
...........\miaobiao.asm.rpt
...........\miaobiao.cdf
...........\miaobiao.done
...........\miaobiao.dpf
...........\miaobiao.fit.rpt
...........\miaobiao.fit.smsg
...........\miaobiao.fit.summary
...........\miaobiao.flow.rpt
...........\miaobiao.map.rpt
...........\miaobiao.map.summary
...........\miaobiao.pin
...........\miaobiao.pof
...........\miaobiao.qpf
...........\miaobiao.qsf
...........\miaobiao.qws
...........\miaobiao.sof
...........\miaobiao.tan.rpt
...........\miaobiao.tan.summary
...........\miaobiao.vhd
...........\miaobiao_assignment_defaults.qdf
Second_VHDL