文件名称:clkdiv
介绍说明－－下载内容均来自于网络，请自行研究使用
任意分频电路的verilog实现，包含奇分频和偶分频-Arbitrary divider circuit verilog achieve, contains odd and even frequency divider
(系统自动生成,下载前可以参看下载内容)
下载文件列表
clkdiv\divn.v
......\divn.v.bak
......\testdivn.v
......\test_m.cr.mti
......\test_m.mpf
......\vsim.wlf
......\work\divn\verilog.asm
......\....\....\verilog.rw
......\....\....\_primary.dat
......\....\....\_primary.dbs
......\....\....\_primary.vhd
......\....\testdivn\verilog.asm
......\....\........\verilog.rw
......\....\........\_primary.dat
......\....\........\_primary.dbs
......\....\........\_primary.vhd
......\....\_info
......\....\_vmake
......\....\divn
......\....\testdivn
......\....\_temp
......\work
clkdiv