文件名称:shixian_of_UART
介绍说明－－下载内容均来自于网络，请自行研究使用
串口控制器的FPGA实现,用Verilog语言编写!-Serial controller FPGA, Verilog language!
(系统自动生成,下载前可以参看下载内容)
下载文件列表
UART_PACKAGE.vhd
baudrate_generator.vhd
baudrate_generator_TB.vhd
counter.vhd
counter_TB.vhd
detector.vhd
detector_TB.vhd
parity_verifier.vhd
parity_verifier_TB.vhd
shift_register.vhd
shift_register_TB.vhd
switch.vhd
switch_bus.vhd
switch_bus_TB.vhd
uart_core.vhd
uart_top.vhd
uart_top_tb.vhd