文件名称:grlib-netlists-1.1.0.tar
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leon for 3 fpu. The LEON3 is a synthesisable VHDL model of a 32-bit processor compliant with the SPARC V8 architecture. The model is highly configurable, and particularly suitable for system-on-a-chip (SOC) designs.
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45665982grlib-netlists-1.1.0.tar