文件名称:DE2_SOPC_Builder

  • 所属分类:
  • VHDL编程
  • 资源属性:
  • [C/C++] [源码]
  • 上传时间:
  • 2012-11-26
  • 文件大小:
  • 2.22mb
  • 下载次数:
  • 0次
  • 提 供 者:
  • 梦*
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  • 别用迅雷下载,失败请重下,重下不扣分!

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基于DE2的SOPC的构建(verilogHDL)-Based on the DE2 board of SOPC (verilogHDL)
(系统自动生成,下载前可以参看下载内容)

下载文件列表

SOPC_Builder\Component\Audio_DAC_FIFO\cb_generator.pl

............\.........\..............\class.ptf

............\.........\..............\hdl\AUDIO_DAC_FIFO.v

............\.........\..............\...\FIFO_16_256.v

............\.........\Binary_VGA_Controller\cb_generator.pl

............\.........\.....................\class.ptf

............\.........\.....................\hdl\Img_DATA.hex

............\.........\.....................\...\Img_RAM.v

............\.........\.....................\...\VGA_Controller.v

............\.........\.....................\...\VGA_NIOS_CTRL.v

............\.........\.....................\...\VGA_OSD_RAM.v

............\.........\.....................\...\VGA_Param.h

............\.........\.....................\inc\VGA.c

............\.........\.....................\...\VGA.h

............\.........\DM9000A\cb_generator.pl

............\.........\.......\class.ptf

............\.........\.......\hdl\DM9000A_IF.v

............\.........\.......\inc\basic_io.h

............\.........\.......\...\DM9000A.C

............\.........\.......\...\DM9000A.H

............\.........\ISP1362\cb_generator.pl

............\.........\.......\class.ptf

............\.........\.......\hdl\ISP1362_IF.v

............\.........\.......\inc\BASICTYP.H

............\.........\.......\...\COMMON.H

............\.........\.......\...\HAL4D13.C

............\.........\.......\...\HAL4D13.H

............\.........\.......\...\usb_irq.c

............\.........\.......\...\usb_irq.h

............\.........\SEG7_LUT_8\cb_generator.pl

............\.........\..........\class.ptf

............\.........\..........\hdl\SEG7_LUT.v

............\.........\..........\...\SEG7_LUT_8.v

............\.........\..........\inc\basic_io.h

............\.........\.RAM_16Bit_512K\cb_generator.pl

............\.........\...............\class.ptf

............\.........\...............\hdl\SRAM_16Bit_512K.v

............\Reference_Design\DE2_NIOS\.sopc_builder\install.ptf

............\................\........\altpllpll_0.ppf

............\................\........\Audio_0.v

............\................\........\......DAC_FIFO\cb_generator.pl

............\................\........\..............\class.ptf

............\................\........\..............\hdl\AUDIO_DAC_FIFO.v

............\................\........\..............\...\FIFO_16_256.v

............\................\........\AUDIO_DAC_FIFO.v

............\................\........\Audio_PLL.ppf

............\................\........\Audio_PLL.v

............\................\........\bht_ram.mif

............\................\........\Binary_VGA_Controller\cb_generator.pl

............\................\........\.....................\class.ptf

............\................\........\.....................\hdl\Img_DATA.hex

............\................\........\.....................\...\Img_RAM.v

............\................\........\.....................\...\VGA_Controller.v

............\................\........\.....................\...\VGA_NIOS_CTRL.v

............\................\........\.....................\...\VGA_OSD_RAM.v

............\................\........\.....................\...\VGA_Param.h

............\................\........\.....................\inc\VGA.c

............\................\........\.....................\...\VGA.h

............\................\........\button_pio.v

............\................\........\clock_0.v

............\................\........\clock_1.v

............\................\........\cmp_state.ini

............\................\........\cpu_0.ocp

............\................\........\cpu_0.v

............\................\........\cpu_0.vo

............\................\........\cpu_0_bht_ram.mif

............\................\........\cpu_0_dc_tag_ram.mif

............\................\........\cpu_0_ic_tag_ram.mif

............\................\........\cpu_0_jtag_debug_module.v

............\................\........\cpu_0_jtag_debug_module_wrapper.v

............\................\........\cpu_0_mult_cell.v

............\................\........\cpu_0_ocir

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