文件名称:sfdppllli
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简单易懂的可配置dpll的VHDL代码。用于时钟恢复后的相位抖动的的滤波有非常好的效果， 而且能参数化配置pll的级数。 已通过测试。
-Straightforward configuration VHDL code dpll. Very good results for the clock recovery phase jitter filtering, and can be parameterized configuration pll series. Has been tested.
-Straightforward configuration VHDL code dpll. Very good results for the clock recovery phase jitter filtering, and can be parameterized configuration pll series. Has been tested.
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下载文件列表
sfdppllli\fdpll.vhd
sfdppllli
sfdppllli