文件名称:ZHANKONG
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- 单片机(51,AVR,MSP430等)
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- [PDF]
- 上传时间:
- 2012-11-26
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- 153kb
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- 1次
- 提 供 者:
- 林**
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在数字电路的设计中,分频器是一种应用的十分广泛
的基本电路,他的具体功能就是对较高频率的信号进行分
频操作,目的是为了得到所需的较低频率的信号。
在实际的数字电路设计中,设计人员常需要得到占空
比为1∶n的n分频器,例如帧头信号或中断信号等。这
种分频器的设计思路如下:首先设计一个标准计数器,计
数器的模与分频系数相等 然后根据计数器电路的并行信
号输出来决定分频输出信号的高低电平,这样就可以完成
一个输出信号占空比为1∶n的n分频器。-In digital circuit design, the divider is a very wide range of basic circuit of an application specific functions of the higher frequency signal divider operation, the aim is to get the low-frequency signal. In practical digital circuit design, designers often need to be a duty cycle of 1: n-n-divider, such as the header signal or interrupt signals. This divider design ideas are as follows: First, to design a standard counter, the counter mode and frequency coefficient equal then decided to divide the output signal of the high and low based on the parallel signal output of the counter circuit, so that you can complete an output The signal duty cycle is 1: n, n divider.
的基本电路,他的具体功能就是对较高频率的信号进行分
频操作,目的是为了得到所需的较低频率的信号。
在实际的数字电路设计中,设计人员常需要得到占空
比为1∶n的n分频器,例如帧头信号或中断信号等。这
种分频器的设计思路如下:首先设计一个标准计数器,计
数器的模与分频系数相等 然后根据计数器电路的并行信
号输出来决定分频输出信号的高低电平,这样就可以完成
一个输出信号占空比为1∶n的n分频器。-In digital circuit design, the divider is a very wide range of basic circuit of an application specific functions of the higher frequency signal divider operation, the aim is to get the low-frequency signal. In practical digital circuit design, designers often need to be a duty cycle of 1: n-n-divider, such as the header signal or interrupt signals. This divider design ideas are as follows: First, to design a standard counter, the counter mode and frequency coefficient equal then decided to divide the output signal of the high and low based on the parallel signal output of the counter circuit, so that you can complete an output The signal duty cycle is 1: n, n divider.
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ZHANKONG
........\基于FPGACPLD的占空比为1∶n的n分频器的设计.pdf
........\基于FPGACPLD的占空比为1∶n的n分频器的设计.pdf