文件名称:VHDL-for-Datapath
介绍说明--下载内容均来自于网络,请自行研究使用
MIPS CPU with Mulicycle Datapath. This is a custom RISC processor implemented to achieve the function of "lw, sw, add, sub, and, or, beq, j"
Mem.vhd - memory
buffer.vhd - buffer
ALUcon.vhd - Alu controller
pc.vhd - program counter
REG - registers-MIPS CPU with Mulicycle Datapath. This is a custom RISC processor implemented to achieve the function of "lw, sw, add, sub, and, or, beq, j"
Mem.vhd- memory
buffer.vhd- buffer
ALUcon.vhd- Alu controller
pc.vhd- program counter
REG- registers
Mem.vhd - memory
buffer.vhd - buffer
ALUcon.vhd - Alu controller
pc.vhd - program counter
REG - registers-MIPS CPU with Mulicycle Datapath. This is a custom RISC processor implemented to achieve the function of "lw, sw, add, sub, and, or, beq, j"
Mem.vhd- memory
buffer.vhd- buffer
ALUcon.vhd- Alu controller
pc.vhd- program counter
REG- registers
(系统自动生成,下载前可以参看下载内容)
下载文件列表
VHDL for Datapath
.................\ALU.vhd
.................\ALUcon.vhd
.................\buffer.vhd
.................\datapath controller.vhd
.................\Mem.vhd
.................\MIPS.vhd
.................\mux.vhd
.................\pc.vhd
.................\REG.vhd
.................\SEandSL.vhd
.................\shift.vhd
.................\ALU.vhd
.................\ALUcon.vhd
.................\buffer.vhd
.................\datapath controller.vhd
.................\Mem.vhd
.................\MIPS.vhd
.................\mux.vhd
.................\pc.vhd
.................\REG.vhd
.................\SEandSL.vhd
.................\shift.vhd