mp3_player\.sopc_builder\filters.xml

..........\.............\preferences.xml

..........\.sopc_builder

..........\altpllpll.qip

..........\altpllpll.v

..........\altpllpll_bb.v

..........\alt_mem_phy_defines.v

..........\alt_mem_phy_sequencer.vhd

..........\audio_controller.v

..........\auk_ddr_hp_controller.ocp

..........\auk_ddr_hp_controller.vhd

..........\auk_ddr_hp_init.ocp

..........\board_settings.tcl

..........\button_pio.v

..........\cpu.ocp

..........\cpu.sdc

..........\cpu.v

..........\cpu_bht_ram.mif

..........\cpu_dc_tag_ram.mif

..........\cpu_ddr_clock_bridge.v

..........\cpu_fmul_inst.v

..........\cpu_ic_tag_ram.mif

..........\cpu_jtag_debug_module_sysclk.v

..........\cpu_jtag_debug_module_tck.v

..........\cpu_jtag_debug_module_wrapper.v

..........\cpu_mult_cell.v

..........\cpu_ociram_default_contents.mif

..........\cpu_oci_test_bench.v

..........\cpu_rf_ram_a.mif

..........\cpu_rf_ram_b.mif

..........\cpu_test_bench.v

..........\cycloneIII_embedded_evaluation_kit_standard.cdf

..........\cycloneIII_embedded_evaluation_kit_standard.jdi

..........\cycloneIII_embedded_evaluation_kit_standard.qpf

..........\cycloneIII_embedded_evaluation_kit_standard.qsf

..........\cycloneIII_embedded_evaluation_kit_standard.qws

..........\cycloneIII_embedded_evaluation_kit_standard.sdc

..........\cycloneIII_embedded_evaluation_kit_standard.sof

..........\cycloneIII_embedded_evaluation_kit_standard.v

..........\cycloneIII_embedded_evaluation_kit_standard_assignment_defaults.qdf

..........\cycloneIII_embedded_evaluation_kit_standard_settings.tcl

..........\cycloneIII_embedded_evaluation_kit_standard_sopc.ptf

..........\cycloneIII_embedded_evaluation_kit_standard_sopc.ptf.8.0

..........\cycloneIII_embedded_evaluation_kit_standard_sopc.qip

..........\cycloneIII_embedded_evaluation_kit_standard_sopc.sopc

..........\cycloneIII_embedded_evaluation_kit_standard_sopc.sopcinfo

..........\cycloneIII_embedded_evaluation_kit_standard_sopc.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_0.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_1.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_2.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_3.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_4.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_5.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_6.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_burst_7.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_clock_0.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_clock_1.v

..........\cycloneIII_embedded_evaluation_kit_standard_sopc_setup_quartus.tcl

..........\db\cycloneIII_embedded_evaluation_kit_standard.db_info

..........\db

..........\ddr_o.vhd

..........\ddr_sdram.qip

..........\ddr_sdram.v

..........\ddr_sdram_advisor.ipa

..........\ddr_sdram_auk_ddr_hp_controller_wrapper.v

..........\ddr_sdram_controller_phy.v

..........\ddr_sdram_example_driver.v

..........\ddr_sdram_example_top.sdc

..........\ddr_sdram_example_top.v

..........\ddr_sdram_example_top_1.v

..........\ddr_sdram_example_top_10.v

..........\ddr_sdram_example_top_11.v

..........\ddr_sdram_example_top_12.v

..........\ddr_sdram_example_top_13.v

..........\ddr_sdram_example_top_14.v

..........\ddr_sdram_example_top_15.v

..........\ddr_sdram_example_top_16.v

..........\ddr_sdram_example_top_17.v

..........\ddr_sdram_example_top_18.v

..........\ddr_sdram_example_top_19.v

..........\ddr_sdram_example_top_2.v

..........\ddr_sdram_example_top_20.v

..........\ddr_sdram_example_top_21.v

..........\ddr_sdram_example_top_22.v

..........\ddr_sdram_example_top_23.v

..........\ddr_sdram_example_top_24.v

..........\ddr_sdram_example_top_25.v

..........\ddr_sdram_example_top_26.v

..........\ddr_sdram_example_top_3.v

..........\ddr_sdram_example_top_4.v

..........\ddr_sdram_example_top_5.v

..........\ddr_sdram_example_top_6.v

..........\ddr_sdram_example_top_7.v

..........\ddr_sdram_example_top_8.v

..........\ddr_sdram_example_top_9.