文件名称:CPU
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流水式CPU设计，实现在MIPS基础上修改的16位THCO-MIPS指令系统，解决了数据、结构、控制冲突，并实现了软硬中断-Pipelined CPU design, implementation, based on changes in the MIPS 16-bit THCO-MIPS instruction set to address the data structure, control of conflict, and to achieve the hard and soft interrupt
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下载文件列表
advanced
........\barrier.vhd
........\cache.vhd
........\cpu.bit
........\CPU.vhd
........\data_bypass.vhd
........\executor.vhd
........\instruction_decoder.vhd
........\memory.vhd
........\reg_controller.vhd
........\barrier.vhd
........\cache.vhd
........\cpu.bit
........\CPU.vhd
........\data_bypass.vhd
........\executor.vhd
........\instruction_decoder.vhd
........\memory.vhd
........\reg_controller.vhd