文件名称:FPGA-verilog
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FPGA代码verilog，其中包含多个常用的代码程序，非常适合初学者参考-FPGA code verilog, which contains more than one common code procedures, reference is ideal for beginners
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下载文件列表
code\cpu_interface\cpu_inface_tb.v
....\.............\cpu_interface.v
....\FIFO\同步FIFO\FIFO设计程序\FIFO.doc
....\....\........\............\fifo.v
....\....\........\............\fifotb.v
....\....\........\............\~$FIFO.doc
....\....\异步FIFO\fifo_asyn.v
....\sent_receive_code\clkfp.v
....\.................\dividor.v
....\.................\pnpro.v
....\.................\pnsend.v
....\.................\receiver.v
....\.................\signp.v
....\.................\test_tb.v
....\.................\top.v
....\.................\transfer.v
....\tmux\tmux.v
....\....\tmux_tb.v
....\异步FIFO结构\异步FIFO结构001.pdf
....\............\异步FIFO结构002.pdf
....\............\异步FIFO结构003.pdf
....\第一天代码\乘法器\mul16.v
....\..........\分频\devide_f_8.v
....\..........\....\devide_f_8.v.bak
....\..........\....\div_5.v
....\..........\....\div_5.v.bak
....\..........\....\div_5_11.v
....\..........\....\div_5_11.v.bak
....\..........\序列检测\xlcheck.v
....\..........\........\xlcheck.v.bak
....\..........\........\xlcheck1.v
....\..........\抢答器\snag.v
....\..........\拨码开关控制数码管\led8v.v
....\..........\按键控制LED\led2.v
....\..........\数控分频器\pulse.v
....\..........\自然二进制码和格雷码的转换\Binary_to_Gray.v
....\..........\..........................\Gray_to_Binary.v
....\..三天代码\拨码开关控制数码管\led8v.v
....\..........\模块化设计1\moddes.v
....\..........\..........2\clkfp.v
....\..........\...........\pnpro.v
....\..........\...........\pnsend.v
....\..........\...........\signp.v
....\..二天代码\Source\debussy.rc
....\..........\......\iq_pn_gen.v
....\..........\......\pni_gold.dat
....\..........\......\pni_testout.dat
....\..........\......\pnq_gold.dat
....\..........\......\pnq_testout.dat
....\..........\......\pn_gen_srl_test.v
....\..........\序列检测\xlcheck.v
....\..........\........\xlcheck.v.bak
....\..四天代码\流水线设计\pip.v
....\..........\..........\pipadd.v
....\..........\..........\pipshift.v
....\..........\..........\pipsub.v
....\FIFO\同步FIFO\FIFO设计程序
....\....\同步FIFO
....\....\异步FIFO
....\第一天代码\乘法器
....\..........\分频
....\..........\序列检测
....\..........\抢答器
....\..........\拨码开关控制数码管
....\..........\按键控制LED
....\..........\数控分频器
....\..........\自然二进制码和格雷码的转换
....\..三天代码\拨码开关控制数码管
....\..........\模块化设计1
....\..........\模块化设计2
....\..二天代码\Source
....\..........\序列检测
....\..四天代码\流水线设计
....\cpu_interface
....\FIFO
....\sent_receive_code
....\tmux
....\异步FIFO结构
....\第一天代码
....\第三天代码
....\第二天代码
....\第四天代码
code
....\.............\cpu_interface.v
....\FIFO\同步FIFO\FIFO设计程序\FIFO.doc
....\....\........\............\fifo.v
....\....\........\............\fifotb.v
....\....\........\............\~$FIFO.doc
....\....\异步FIFO\fifo_asyn.v
....\sent_receive_code\clkfp.v
....\.................\dividor.v
....\.................\pnpro.v
....\.................\pnsend.v
....\.................\receiver.v
....\.................\signp.v
....\.................\test_tb.v
....\.................\top.v
....\.................\transfer.v
....\tmux\tmux.v
....\....\tmux_tb.v
....\异步FIFO结构\异步FIFO结构001.pdf
....\............\异步FIFO结构002.pdf
....\............\异步FIFO结构003.pdf
....\第一天代码\乘法器\mul16.v
....\..........\分频\devide_f_8.v
....\..........\....\devide_f_8.v.bak
....\..........\....\div_5.v
....\..........\....\div_5.v.bak
....\..........\....\div_5_11.v
....\..........\....\div_5_11.v.bak
....\..........\序列检测\xlcheck.v
....\..........\........\xlcheck.v.bak
....\..........\........\xlcheck1.v
....\..........\抢答器\snag.v
....\..........\拨码开关控制数码管\led8v.v
....\..........\按键控制LED\led2.v
....\..........\数控分频器\pulse.v
....\..........\自然二进制码和格雷码的转换\Binary_to_Gray.v
....\..........\..........................\Gray_to_Binary.v
....\..三天代码\拨码开关控制数码管\led8v.v
....\..........\模块化设计1\moddes.v
....\..........\..........2\clkfp.v
....\..........\...........\pnpro.v
....\..........\...........\pnsend.v
....\..........\...........\signp.v
....\..二天代码\Source\debussy.rc
....\..........\......\iq_pn_gen.v
....\..........\......\pni_gold.dat
....\..........\......\pni_testout.dat
....\..........\......\pnq_gold.dat
....\..........\......\pnq_testout.dat
....\..........\......\pn_gen_srl_test.v
....\..........\序列检测\xlcheck.v
....\..........\........\xlcheck.v.bak
....\..四天代码\流水线设计\pip.v
....\..........\..........\pipadd.v
....\..........\..........\pipshift.v
....\..........\..........\pipsub.v
....\FIFO\同步FIFO\FIFO设计程序
....\....\同步FIFO
....\....\异步FIFO
....\第一天代码\乘法器
....\..........\分频
....\..........\序列检测
....\..........\抢答器
....\..........\拨码开关控制数码管
....\..........\按键控制LED
....\..........\数控分频器
....\..........\自然二进制码和格雷码的转换
....\..三天代码\拨码开关控制数码管
....\..........\模块化设计1
....\..........\模块化设计2
....\..二天代码\Source
....\..........\序列检测
....\..四天代码\流水线设计
....\cpu_interface
....\FIFO
....\sent_receive_code
....\tmux
....\异步FIFO结构
....\第一天代码
....\第三天代码
....\第二天代码
....\第四天代码
code