文件名称:lab06
- 所属分类:
- 微处理器(ARM/PowerPC等)
- 资源属性:
- [VHDL] [源码]
- 上传时间:
- 2012-11-26
- 文件大小:
- 3.56mb
- 下载次数:
- 0次
- 提 供 者:
- 徐**
- 相关连接:
- 无
- 下载说明:
- 别用迅雷下载,失败请重下,重下不扣分!
介绍说明--下载内容均来自于网络,请自行研究使用
流水线CPU设计,最接近真实运行的学生实验课的CPU设计,是组成原理实验课大作业,包涵详细讲解-CPU design
(系统自动生成,下载前可以参看下载内容)
下载文件列表
lab06_吴纯纯_王景峰_王少萍_谢志宇
.................................\PipelineCPU
.................................\...........\ALU.v
.................................\...........\ALU.v.bak
.................................\...........\BarrelShifter.v
.................................\...........\BarrelShifter.v.bak
.................................\...........\ControlHazard.v
.................................\...........\ControlHazard.v.bak
.................................\...........\ControlUnit.v
.................................\...........\ControlUnit.v.bak
.................................\...........\DataMemory.v
.................................\...........\DataMemory.v.bak
.................................\...........\Ex_Mem.v
.................................\...........\Ex_Mem.v.bak
.................................\...........\Extender.v
.................................\...........\ForwardUnit.v
.................................\...........\ForwardUnit.v.bak
.................................\...........\ID_Ex.v
.................................\...........\ID_Ex.v.bak
.................................\...........\IF_ID.v
.................................\...........\IF_ID.v.bak
.................................\...........\InstMemory.v
.................................\...........\InstMemory.v.bak
.................................\...........\LoadUseDetector.v
.................................\...........\LoadUseDetector.v.bak
.................................\...........\LoadWordUnit.v
.................................\...........\LoadWordUnit.v.bak
.................................\...........\Mem_Wr.v
.................................\...........\Mem_Wr.v.bak
.................................\...........\Mux3_1.v
.................................\...........\Mux3_1.v.bak
.................................\...........\Mux4_1.v
.................................\...........\Mux4_1.v.bak
.................................\...........\Mux_32.v
.................................\...........\Mux_5.v
.................................\...........\PCSourceGenerator.v
.................................\...........\PCSourceGenerator.v.bak
.................................\...........\PCount.v
.................................\...........\PCount.v.bak
.................................\...........\PipelineCPU.qpf
.................................\...........\PipelineCPU.qsf
.................................\...........\PipelineCPU.v
.................................\...........\PipelineCPU.v.bak
.................................\...........\PipelineCPU.vwf
.................................\...........\PipelineCPU_assignment_defaults.qdf
.................................\...........\RegisterGroup.v
.................................\...........\RegisterGroup.v.bak
.................................\...........\db
.................................\...........\..\PipelineCPU.db_info
.................................\...........\..\PipelineCPU.eco.cdb
.................................\...........\..\PipelineCPU.sim.cvwf
.................................\...........\..\PipelineCPU.sld_design_entry.sci
.................................\...........\..\altsyncram_02j1.tdf
.................................\...........\..\altsyncram_4nq1.tdf
.................................\...........\..\altsyncram_bb01.tdf
.................................\...........\..\altsyncram_mjj1.tdf
.................................\...........\..\altsyncram_mnv.tdf
.................................\...........\..\altsyncram_ohn1.tdf
.................................\...........\..\altsyncram_sqv.tdf
.................................\...........\..\mux_3nc.tdf
.................................\...........\..\mux_aqc.tdf
.................................\...........\..\mux_d3d.tdf
.................................\...........\..\mux_ioc.tdf
.................................\...........\..\mux_umc.tdf
.................................\...........\..\prev_cmp_PipelineCPU.map.qmsg
.................................\...........\..\prev_cmp_PipelineCPU.qmsg
.......
.................................\PipelineCPU
.................................\...........\ALU.v
.................................\...........\ALU.v.bak
.................................\...........\BarrelShifter.v
.................................\...........\BarrelShifter.v.bak
.................................\...........\ControlHazard.v
.................................\...........\ControlHazard.v.bak
.................................\...........\ControlUnit.v
.................................\...........\ControlUnit.v.bak
.................................\...........\DataMemory.v
.................................\...........\DataMemory.v.bak
.................................\...........\Ex_Mem.v
.................................\...........\Ex_Mem.v.bak
.................................\...........\Extender.v
.................................\...........\ForwardUnit.v
.................................\...........\ForwardUnit.v.bak
.................................\...........\ID_Ex.v
.................................\...........\ID_Ex.v.bak
.................................\...........\IF_ID.v
.................................\...........\IF_ID.v.bak
.................................\...........\InstMemory.v
.................................\...........\InstMemory.v.bak
.................................\...........\LoadUseDetector.v
.................................\...........\LoadUseDetector.v.bak
.................................\...........\LoadWordUnit.v
.................................\...........\LoadWordUnit.v.bak
.................................\...........\Mem_Wr.v
.................................\...........\Mem_Wr.v.bak
.................................\...........\Mux3_1.v
.................................\...........\Mux3_1.v.bak
.................................\...........\Mux4_1.v
.................................\...........\Mux4_1.v.bak
.................................\...........\Mux_32.v
.................................\...........\Mux_5.v
.................................\...........\PCSourceGenerator.v
.................................\...........\PCSourceGenerator.v.bak
.................................\...........\PCount.v
.................................\...........\PCount.v.bak
.................................\...........\PipelineCPU.qpf
.................................\...........\PipelineCPU.qsf
.................................\...........\PipelineCPU.v
.................................\...........\PipelineCPU.v.bak
.................................\...........\PipelineCPU.vwf
.................................\...........\PipelineCPU_assignment_defaults.qdf
.................................\...........\RegisterGroup.v
.................................\...........\RegisterGroup.v.bak
.................................\...........\db
.................................\...........\..\PipelineCPU.db_info
.................................\...........\..\PipelineCPU.eco.cdb
.................................\...........\..\PipelineCPU.sim.cvwf
.................................\...........\..\PipelineCPU.sld_design_entry.sci
.................................\...........\..\altsyncram_02j1.tdf
.................................\...........\..\altsyncram_4nq1.tdf
.................................\...........\..\altsyncram_bb01.tdf
.................................\...........\..\altsyncram_mjj1.tdf
.................................\...........\..\altsyncram_mnv.tdf
.................................\...........\..\altsyncram_ohn1.tdf
.................................\...........\..\altsyncram_sqv.tdf
.................................\...........\..\mux_3nc.tdf
.................................\...........\..\mux_aqc.tdf
.................................\...........\..\mux_d3d.tdf
.................................\...........\..\mux_ioc.tdf
.................................\...........\..\mux_umc.tdf
.................................\...........\..\prev_cmp_PipelineCPU.map.qmsg
.................................\...........\..\prev_cmp_PipelineCPU.qmsg
.......